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ICS85411AMLFT PDF预览

ICS85411AMLFT

更新时间: 2024-11-10 21:53:43
品牌 Logo 应用领域
矽成 - ICSI 逻辑集成电路光电二极管驱动
页数 文件大小 规格书
13页 190K
描述
Low Skew, 1-TO-2 DIFFERENTIAL-TO-LVDS FANOUT BUFFER

ICS85411AMLFT 数据手册

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ICS85411  
Integrated  
Circuit  
Systems, Inc.  
L
OW  
S
KEW, 1-TO-2  
D
IFFERENTIAL  
-
TO-LVDS FANOUT  
BUFFER  
GENERAL DESCRIPTION  
FEATURES  
The ICS85411 is a low skew, high performance 2 differential LVDS outputs  
ICS  
1-to-2 Differential-to-LVDS Fanout Buffer and a  
1 differential CLK, nCLK clock input  
HiPerClockS™  
member of the HiPerClockSfamily of High  
Performance Clock Solutions from ICS. The  
CLK, nCLK pair can accept most standard differ-  
CLK, nCLK pair can accept the following differential  
input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL  
ential input levels.The ICS85411 is characterized to oper-  
ate from a 3.3V power supply. Guaranteed output and  
part-to-part skew characteristics make the ICS85411  
ideal for those clock distribution applications demand-  
ing well defined performance and repeatability.  
Maximum output frequency: 650MHz  
Translates any single ended input signal to  
LVDS levels with resistor bias on nCLK input  
Output skew: 20ps (maximum)  
Part-to-part skew: 250ps (maximum)  
Additive phase jitter, RMS: 0.05ps (typical)  
Propagation delay: 2.5 ns (maximum)  
3.3V operating supply  
0°C to 70°C ambient operating temperature  
Lead-Free package available  
Industrial temperature information available upon request  
BLOCK DIAGRAM  
PIN ASSIGNMENT  
Q0  
nQ0  
Q1  
VDD  
1
2
3
4
8
7
6
5
Q0  
nQ0  
CLK  
nCLK  
GND  
CLK  
nCLK  
Q1  
nQ1  
nQ1  
ICS85411  
8-Lead SOIC  
3.90mm x 4.90mm x 1.37mm package body  
M Package  
TopView  
85411AM  
www.icst.com/products/hiperclocks.html  
REV. B JUNE 16, 2004  
1

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