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ICS854210CYLFT PDF预览

ICS854210CYLFT

更新时间: 2024-11-11 20:51:23
品牌 Logo 应用领域
艾迪悌 - IDT 驱动逻辑集成电路
页数 文件大小 规格书
12页 217K
描述
Low Skew Clock Driver, 854210 Series, 5 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, MS-026, LQFP-32

ICS854210CYLFT 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:QFP
包装说明:LQFP,针数:32
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.25系列:854210
输入调节:DIFFERENTIALJESD-30 代码:S-PQFP-G32
JESD-609代码:e3长度:7 mm
逻辑集成电路类型:LOW SKEW CLOCK DRIVER湿度敏感等级:3
功能数量:2反相输出次数:
端子数量:32实输出次数:5
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:LQFP
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE
峰值回流温度(摄氏度):260认证状态:Not Qualified
座面最大高度:1.6 mm最大供电电压 (Vsup):3.465 V
最小供电电压 (Vsup):3.135 V标称供电电压 (Vsup):3.3 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn) - annealed端子形式:GULL WING
端子节距:0.8 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30宽度:7 mm
Base Number Matches:1

ICS854210CYLFT 数据手册

 浏览型号ICS854210CYLFT的Datasheet PDF文件第2页浏览型号ICS854210CYLFT的Datasheet PDF文件第3页浏览型号ICS854210CYLFT的Datasheet PDF文件第4页浏览型号ICS854210CYLFT的Datasheet PDF文件第5页浏览型号ICS854210CYLFT的Datasheet PDF文件第6页浏览型号ICS854210CYLFT的Datasheet PDF文件第7页 
PRELIMINARY  
LOW SKEW, DUAL, 1-TO-5 DIFFERENTIAL-  
TO-LVDS FANOUT BUFFER  
ICS854210  
GENERAL DESCRIPTION  
FEATURES  
The ICS854210 is a low skew, high performance  
Two differential LVDS bank outputs  
ICS  
dual 1-to-5 Differential-to-LVDS Fanout Buffer  
and a member of the HiPerClockS™ family of  
High Performance Clock Solutions from IDT.  
The ICS854210 is characterized to operate  
Two differential LVPECL clock input pairs  
HiPerClockS™  
PCLKx, nPCLKx pairs can accept the following  
differential input levels: LVPECL, LVDS, CML, SSTL  
from a 3.3V power supply. Guaranteed output and part-  
to-part skew characteristics make the ICS854210 ideal for  
those clock distribution applications demanding well  
defined performance and repeatability.  
Maximum output frequency: 2GHz  
Translates any single ended input signal to  
LVDS levels with resistor bias on nPCLKx input  
Output skew: TBD  
Part-to-part skew: TBD  
Propagation delay: 280ps (typical)  
3.3V supply voltage  
-40°C to 85°C ambient operating temperature  
Available in both standard (RoHS 5) and lead-free (RoHS 6)  
packages  
BLOCK DIAGRAM  
PIN ASSIGNMENT  
QA0  
nQA0  
24 23 22 21 20 19 18 17  
PCLKA Pulldown  
nPCLKA Pullup/Pulldown  
VDDO  
25  
26  
27  
28  
29  
30  
31  
32  
16  
15  
14  
13  
12  
11  
10  
9
VDDO  
QB2  
QA1  
nQA2  
QA2  
nQA1  
nQB2  
QB3  
QA2  
nQA2  
nQA1  
QA1  
ICS854210  
QA3  
nQA3  
nQB3  
QB4  
nQA0  
QA0  
QA4  
nQA4  
nQB4  
VDDO  
VDDO  
1
2
3
4
5
6
7
8
QB0  
nQB0  
PCLKB Pulldown  
nPCLKB Pullup/Pulldown  
QB1  
nQB1  
32-Lead LQFP  
QB2  
7mm x 7mm x 1.4mm package body  
nQB2  
Y Package  
Top View  
QB3  
nQB3  
QB4  
nQB4  
The Preliminary Information presented herein represents a product in pre-production.The noted characteristics are based on initial product characterization  
and/or qualification.Integrated DeviceTechnology, Incorporated (IDT) reserves the right to change any circuitry or specifications without notice.  
IDT/ ICSLVDS FANOUT BUFFER  
1
ICS854210CY REV. C MAY 6, 2008  

ICS854210CYLFT 替代型号

型号 品牌 替代类型 描述 数据表
ICS854210CYLF IDT

功能相似

Low Skew Clock Driver, 854210 Series, 5 True Output(s), 0 Inverted Output(s), PQFP32, 7 X
854210CYLFT IDT

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Low Skew Clock Driver, 854210 Series, 5 True Output(s), 0 Inverted Output(s), PQFP32, 7 X
854210CYLF IDT

功能相似

Clock Driver, 854210 Series, 5 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.4

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