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ICS8432BYI-01LFT PDF预览

ICS8432BYI-01LFT

更新时间: 2024-11-04 14:51:19
品牌 Logo 应用领域
艾迪悌 - IDT 时钟外围集成电路晶体
页数 文件大小 规格书
9页 110K
描述
Clock Generator, 700MHz, PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, MS-026, LQFP-32

ICS8432BYI-01LFT 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:QFP
包装说明:LQFP,针数:32
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.76
JESD-30 代码:S-PQFP-G32JESD-609代码:e3
长度:7 mm湿度敏感等级:3
端子数量:32最高工作温度:85 °C
最低工作温度:-40 °C最大输出时钟频率:700 MHz
封装主体材料:PLASTIC/EPOXY封装代码:LQFP
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE
峰值回流温度(摄氏度):260主时钟/晶体标称频率:25 MHz
认证状态:Not Qualified座面最大高度:1.6 mm
最大供电电压:3.465 V最小供电电压:3.135 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.8 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30宽度:7 mm
uPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHERBase Number Matches:1

ICS8432BYI-01LFT 数据手册

 浏览型号ICS8432BYI-01LFT的Datasheet PDF文件第2页浏览型号ICS8432BYI-01LFT的Datasheet PDF文件第3页浏览型号ICS8432BYI-01LFT的Datasheet PDF文件第4页浏览型号ICS8432BYI-01LFT的Datasheet PDF文件第5页浏览型号ICS8432BYI-01LFT的Datasheet PDF文件第6页浏览型号ICS8432BYI-01LFT的Datasheet PDF文件第7页 
PRELIMINARY  
ICS8432-01I  
Integrated  
Circuit  
Systems, Incꢀ  
700MHZ  
LVPECLFREQUENCY SYNTHESIZER  
GENERAL DESCRIPTION  
FEATURES  
The ICS8432-01I is a general purpose, dual out- Dual differential 3.3V LVPECLoutput  
put high frequency synthesizer and a member of  
Selectable crystal oscillator interface and  
the HiPerClockS™ family of High Performance  
LVCMOS reference input  
HiPerClockS™  
Clocks Solutions from ICS. The VCO operates at  
a frequency range of 250MHz to 700MHz.  
31.25MHz to 700MHz output frequency  
The VCO frequency is programmed in steps equal to the value  
of the input reference or crystal frequency. The VCO and out-  
put frequency can be programmed using the serial  
or parallel interfaces to the configuration logic.  
14MHz to 25MHz crystal or reference frequency  
Parallel or serial interface for programming counter  
and output dividers  
VCO range: 250MHz to 700MHz  
3.3V supply voltage  
-40°C to 85°C ambient operating temperature  
BLOCK DIAGRAM  
PIN ASSIGNMENT  
VCO_SEL  
XTAL_SEL  
TEST_CLK  
0
32 31 30 29 28 27 26 25  
XTAL1  
1
M5  
OSC  
1
2
3
4
5
6
7
8
24  
23  
22  
21  
20  
19  
18  
17  
XTAL1  
XTAL2  
M6  
M7  
M8  
N0  
N1  
nc  
TEST_CLK  
XTAL_SEL  
VCCA  
ICS8432-01I  
S_LOAD  
S_DATA  
S_CLOCK  
MR  
PLL  
PHASE DETECTOR  
0
VEE  
MR  
VCO  
FOUT0  
nFOUT0  
FOUT1  
nFOUT1  
÷ N  
9
10 11 12 13 14 15 16  
÷ M  
1
S_LOAD  
S_DATA  
S_CLOCK  
nP_LOAD  
CONFIGURATION  
INTERFACE  
LOGIC  
TEST  
32-Lead LQFP  
7mm x 7mm x 1.4mm package body  
M0:M8  
N0:N1  
Y Package  
Top View  
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial  
product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.  
8432BYI-01  
www.icst.com/products/hiperclocks.html  
REV. B JULY 30, 2001  
1

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