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ICS8432BK-51T PDF预览

ICS8432BK-51T

更新时间: 2024-11-03 20:26:43
品牌 Logo 应用领域
艾迪悌 - IDT 时钟外围集成电路晶体
页数 文件大小 规格书
16页 217K
描述
Clock Generator, 700MHz, 5 X 5 MM, 0.95 MM PITCH, VFQFN-32

ICS8432BK-51T 技术参数

是否无铅:含铅是否Rohs认证:不符合
生命周期:Obsolete零件包装代码:QFN
包装说明:HVQCCN, LCC32,.2SQ,20针数:32
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.19
Is Samacsys:NJESD-30 代码:S-XQCC-N32
JESD-609代码:e0长度:5 mm
湿度敏感等级:3端子数量:32
最高工作温度:70 °C最低工作温度:
最大输出时钟频率:700 MHz封装主体材料:UNSPECIFIED
封装代码:HVQCCN封装等效代码:LCC32,.2SQ,20
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):225电源:3.3 V
主时钟/晶体标称频率:25 MHz认证状态:Not Qualified
座面最大高度:1 mm子类别:Clock Generators
最大压摆率:135 mA最大供电电压:3.465 V
最小供电电压:3.135 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn85Pb15)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:5 mmuPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHER
Base Number Matches:1

ICS8432BK-51T 数据手册

 浏览型号ICS8432BK-51T的Datasheet PDF文件第2页浏览型号ICS8432BK-51T的Datasheet PDF文件第3页浏览型号ICS8432BK-51T的Datasheet PDF文件第4页浏览型号ICS8432BK-51T的Datasheet PDF文件第5页浏览型号ICS8432BK-51T的Datasheet PDF文件第6页浏览型号ICS8432BK-51T的Datasheet PDF文件第7页 
PRELIMINARY  
ICS8432-51K  
Integrated  
Circuit  
Systems, Inc.  
700MH  
Z
, CRYSTAL  
-
TO-3.3V DIFFERENTIAL  
LVPECL FREQUENCY  
SYNTHESIZER  
GENERAL DESCRIPTION  
FEATURES  
The ICS8432-51K is a general purpose, dual out- Dual differential 3.3V LVPECL outputs  
ICS  
put Crystal-to-3.3V Differential LVPECL High Fre-  
Selectable crystal oscillator interface or  
quency Synthesizer and a member of the  
LVCMOS/LVTTLTEST_CLK  
HiPerClockS™  
HiPerClockS™ family of High Performance Clock  
Solutions from ICS. The ICS8432-51K has a se-  
Output frequency range: 31.25MHz to 700MHz  
Crystal input frequency range: 12MHz to 25MHz  
VCO range: 250MHz to 700MHz  
lectable TEST_CLK or crystal input. The VCO operates at a  
frequency range of 250MHz to 700MHz. The VCO frequency  
is programmed in steps equal to the value of the input reference  
or crystal frequency. The VCO and output frequency  
can be programmed using the serial or parallel interface to  
the configuration logic. The low phase noise characteristics  
of the ICS8432-51K make it an ideal clock source for Gigabit  
Ethernet, Fibre Channel 1 and 2, and Infiniband applications.  
Parallel or serial interface for programming counter  
and output dividers  
RMS period jitter: 3.5ps (maximum)  
Cycle-to-cycle jitter: 25ps (maximum)  
3.3V supply voltage  
0°C to 70°C ambient operating temperature  
Replaces the ICS8432-01  
BLOCK DIAGRAM  
PIN ASSIGNMENT  
VCO_SEL  
XTAL_SEL  
TEST_CLK  
0
32 31 30 29 28 27 26 25  
XTAL1  
M5  
M6  
M7  
M8  
N0  
N1  
nc  
1
2
3
4
5
6
7
8
24  
23  
22  
21  
20  
19  
18  
17  
1
XTAL2  
OSC  
TEST_CLK  
XTAL_SEL  
VCCA  
XTAL2  
ICS8432-51K  
S_LOAD  
S_DATA  
S_CLOCK  
MR  
PLL  
PHASE DETECTOR  
÷1  
MR  
VEE  
0
VCO  
÷2  
FOUT0  
nFOUT0  
FOUT1  
nFOUT1  
9
10 11 12 13 14 15 16  
÷4  
÷8  
÷ M  
1
S_LOAD  
S_DATA  
S_CLOCK  
nP_LOAD  
CONFIGURATION  
INTERFACE  
LOGIC  
TEST  
32-LeadVFQFN  
5mm x 5mm x 0.95m package body  
K Package  
M0:M8  
N0:N1  
TopView  
The Preliminary Information presented herein represents a product in prototyping or pre-production.The noted characteristics are based on initial  
product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.  
8432BK-51  
www.icst.com/products/hiperclocks.html  
REV. A MARCH 22, 2004  
1

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