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ICS843246BG PDF预览

ICS843246BG

更新时间: 2024-11-03 20:43:15
品牌 Logo 应用领域
艾迪悌 - IDT 时钟光电二极管外围集成电路晶体
页数 文件大小 规格书
17页 345K
描述
Clock Generator, 340MHz, PDSO24, MO-153, TSSOP-24

ICS843246BG 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:HTSSOP,针数:24
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.32
JESD-30 代码:R-PDSO-G24JESD-609代码:e0
长度:7.8 mm湿度敏感等级:1
端子数量:24最高工作温度:70 °C
最低工作温度:最大输出时钟频率:340 MHz
封装主体材料:PLASTIC/EPOXY封装代码:HTSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, HEAT SINK/SLUG, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):240主时钟/晶体标称频率:33.333 MHz
认证状态:Not Qualified座面最大高度:1.1 mm
最大供电电压:3.465 V最小供电电压:3.135 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:4.4 mm
uPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHERBase Number Matches:1

ICS843246BG 数据手册

 浏览型号ICS843246BG的Datasheet PDF文件第2页浏览型号ICS843246BG的Datasheet PDF文件第3页浏览型号ICS843246BG的Datasheet PDF文件第4页浏览型号ICS843246BG的Datasheet PDF文件第5页浏览型号ICS843246BG的Datasheet PDF文件第6页浏览型号ICS843246BG的Datasheet PDF文件第7页 
FEMTOCLOCKS™ CRYSTAL-TO-3.3V LVPECL FREQUENCY  
SYNTHESIZER W/INTEGRATED FANOUT BUFFER  
ICS843246  
GENERAL DESCRIPTION  
FEATURES  
The ICS843246 is a Crystal-to-3.3V LVPECL Clock  
Six LVPECL outputs  
ICS  
HiPerClockS™  
Synthesizer/Fanout Buffer designed for Fibre  
Channel and Gigabit Ethernet applications and is  
a member of the HiperClockS™ family of High  
Performance Clock Solutions from IDT. The output  
Crystal oscillator interface  
VCO range: 490MHz to 680MHz  
Crystal input frequency range: 25MHz to 33.333MHz  
frequency can be set using the frequency select pins and a  
25MHz crystal for Ethernet frequencies, or a 26.5625MHz  
crystal for a Fibre Channel.The low phase noise characteristics  
of the ICS843246 make it an ideal clock for these demanding  
applications.  
RMS phase jitter at 125MHz, using a 25MHz crystal  
(1.875MHz to 20MHz): 0.41ps (typical)  
Full 3.3V or 3.3V core, 2.5V output supply mode  
Core/Output  
3.3V/3.3V  
3.3V/2.5V  
0°C to 70°C ambient operating temperature  
SELECT FUNCTION TABLE  
Available in both standard (RoHS 5) and lead-free (RoHS 6)  
packages  
Inputs  
Function  
FB_SEL N_SEL1 N_SEL0 M Divide N Divide  
M/N  
10  
5
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
20  
20  
20  
20  
24  
24  
24  
24  
2
4
5
4
8
2.5  
8
3
4
6
6
4
12  
2
BLOCK DIAGRAM  
PIN ASSIGNMENT  
Q0  
nQ0  
VCCO  
VCCO  
Q3  
nQ3  
1
2
24  
23  
Pullup  
PLL_BYPASS  
Q4  
nQ4  
nQ2  
Q2  
3
4
22  
21  
Q1  
nQ1  
Q1  
nQ0  
1
0
5
6
7
20  
19  
18  
17  
Q5  
nQ1  
nQ5  
N_SEL1  
VEE  
Output  
Divider  
XTAL_IN  
OSC  
Q2  
Q0  
PLL_BYPASS  
VCCA  
8
9
10  
11  
12  
PLL  
VEE  
16  
15  
14  
13  
XTAL_OUT  
nQ2  
N_SEL0  
XTAL_OUT  
XTAL_IN  
VCC  
FB_SEL  
Q3  
Feedback  
Divider  
nQ3  
ICS843246  
24-Lead TSSOP, E-Pad  
4.40mm x 7.8mm x 0.9mm  
body package  
Pulldown  
FB_SEL  
Q4  
Pullup  
nQ4  
N_SEL1  
G Package  
Top View  
Pullup  
N_SEL0  
Q5  
nQ5  
IDT/ ICS3.3V LVPECL FREQUENCY SYNTHESIZER  
1
ICS843246BG REV. A August 2, 2007  

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