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ICS84321 PDF预览

ICS84321

更新时间: 2024-11-02 21:53:59
品牌 Logo 应用领域
矽成 - ICSI /
页数 文件大小 规格书
18页 204K
描述
260MHZ, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER

ICS84321 数据手册

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ICS84321  
260MHZ, CRYSTAL-TO-3.3V DIFFERENTIAL  
LVPECL FREQUENCY SYNTHESIZER  
Integrated  
Circuit  
Systems, Inc.  
GENERAL DESCRIPTION  
FEATURES  
The ICS84321 is a general purpose, dual output Dual differential 3.3V LVPECL outputs  
ICS  
Crystal-to-3.3V Differential LVPECL High Frequency  
Synthesizer and a member of the HiPerClockS™  
family of High Performance Clock Solutions from  
ICS.The ICS84321 has a selectable TEST_CLK or  
Selectable crystal oscillator interface  
or LVCMOS/LVTTLTEST_CLK  
HiPerClockS™  
Output frequency range: 103.3MHz to 260MHz  
Crystal input frequency range: 14MHz to 40MHz  
VCO range: 620MHz to 780MHz  
crystal inputs.TheVCO operates at a frequency range of 620MHz  
to 780MHz.The VCO frequency is programmed in steps equal  
to the value of the input reference or crystal frequency.TheVCO  
and output frequency can be programmed using the serial or  
parallel interfaces to the configuration logic.  
Parallel or serial interface for programming counter  
and output dividers  
RMS period jitter: 3ps (typical)  
RMS phase jitter at 155.52MHz, using a 38.88MHz crystal  
(12kHz to 20MHz): 2.5ps (typical)  
Phase noise: 155.52MHz  
Offset  
Noise Power  
100Hz ..................-84.1 dBc/Hz  
1kHz ................-109.8 dBc/Hz  
10kHz ................-126.3 dBc/Hz  
100kHz ................-128.7 dBc/Hz  
3.3V supply voltage  
0°C to 70°C ambient operating temperature  
Lead-Free package RoHS compliant  
BLOCK DIAGRAM  
VCO_SEL  
PIN ASSIGNMENT  
XTAL_SEL  
TEST_CLK  
0
32 31 30 29 28 27 26 25  
XTAL_IN  
1
M5  
M6  
M7  
M8  
N0  
N1  
nc  
OSC  
1
2
3
4
5
6
7
8
24  
23  
22  
21  
20  
19  
18  
17  
XTAL_OUT  
TEST_CLK  
XTAL_SEL  
VCCA  
XTAL_OUT  
ICS84321  
S_LOAD  
S_DATA  
S_CLOCK  
MR  
PLL  
PHASE DETECTOR  
÷ 3  
MR  
÷ 4  
÷ 5  
÷ 6  
0
VEE  
VCO  
FOUT0  
nFOUT0  
FOUT1  
nFOUT1  
9
10 11 12 13 14 15 16  
÷ M  
1
S_LOAD  
S_DATA  
S_CLOCK  
nP_LOAD  
CONFIGURATION  
INTERFACE  
LOGIC  
TEST  
32-Lead LQFP  
7mm x 7mm x 1.4mm package body  
Y Package  
TopView  
M0:M8  
N0:N1  
84321AY  
www.icst.com/products/hiperclocks.html  
REV. B JUNE 9, 2005  
1

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