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ICS501BMILFT PDF预览

ICS501BMILFT

更新时间: 2024-11-07 04:15:39
品牌 Logo 应用领域
艾迪悌 - IDT 晶体时钟发生器微控制器和处理器外围集成电路光电二极管
页数 文件大小 规格书
7页 170K
描述
LOCO⑩ PLL CLOCK MULTIPLIER

ICS501BMILFT 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP, SOP8,.25针数:8
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.75
其他特性:ALSO OPERATES AT 5V SUPPLYJESD-30 代码:R-PDSO-G8
JESD-609代码:e3长度:4.9 mm
湿度敏感等级:1端子数量:8
最高工作温度:85 °C最低工作温度:-40 °C
最大输出时钟频率:15 MHz封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP8,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260电源:3.3/5 V
主时钟/晶体标称频率:7.5 MHz认证状态:Not Qualified
座面最大高度:1.75 mm子类别:Clock Generators
最大供电电压:5.25 V最小供电电压:3.14 V
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn) - annealed端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:3.9 mm
uPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHERBase Number Matches:1

ICS501BMILFT 数据手册

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DATASHEET  
LOCO™ PLL CLOCK MULTIPLIER  
ICS501B  
Description  
Features  
TM  
The ICS501B LOCO is the most cost effective way to  
Packaged as 8 pin SOIC or die  
Available in Pb (lead) free package  
IDT’s lowest cost PLL clock  
generate a high-quality clock output from a lower  
frequency crystal or clock input. The name LOCO  
stands for Low Cost Oscillator, as it is designed to  
replace crystal oscillators in most electronic systems.  
Using Phase-Locked Loop (PLL) techniques, the  
device uses a standard fundamental mode,  
inexpensive crystal to produce output clocks up to 15  
MHz.  
Zero ppm multiplication error  
Output clock frequencies up to 15 MHz  
Extremely low jitter of 25 ps (one sigma)  
Compatible with popular CPUs  
Duty cycle of 45/55 up to 20 MHz  
Nine selectable frequencies  
Operating voltage of 3.3 V or 5.5 V  
Tri-state output for board level testing  
25 mA drive capability at TTL levels  
Ideal for oscillator replacement  
Industrial temperature version available  
Advanced, low-power CMOS process  
Stored in the chip’s ROM is the ability to generate nine  
different multiplication factors, allowing one chip to  
output many common frequencies (see table on page  
2).  
The device also has an output enable pin which  
tri-states the clock output when the OE pin is taken low.  
This product is intended for clock generation. It has low  
output jitter (variation in the output period), but input to  
output skew and jitter are not defined or guaranteed.  
For applications which require defined input to output  
skew, use the ICS570B.  
Block Diagram  
VDD  
2
S1:0  
PLL Clock  
Multiplier  
Circuitry  
and ROM  
X1/ICLK  
CLK  
Crystal or  
Clock input  
Crystal  
Oscillator  
X2  
Optional crystal capacitors  
OE  
GND  
IDT™ / ICS™ LOCO™ PLL CLOCK MULTIPLIER  
1
ICS501B  
REV D 120307  

ICS501BMILFT 替代型号

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