Datasheet > ICS388R-XXIT

ICS388R-XXIT

更新时间： 2024-09-27 07:25:39

品牌	Logo	应用领域
艾迪悌 - IDT		光电二极管
页数	文件大小	规格书
5页	72K
描述
Clock Generator, 200MHz, CMOS, PDSO20, 0.150 INCH, SSOP-20

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ICS388R-XXIT 数据手册

ICS388

Quad PLL Quick Turn Clock Synthesizer

Description

Features

• Packaged as 20 pin SSOP (QSOP)

• Quick turn frequency programming allows

samples as quickly as one day

The ICS388 QTClock™ generates up to 9 high quality,

high frequency clock outputs including a reference

from a low frequency crystal or clock input. It is designed

to replace crystals and crystal oscillators in most

electronic systems. The ICS388 contains a One Time

Programmable (OTP) ROM which is factory programmed

with PLL divider values to output a broad range of

frequencies up to 200 MHz, allowing customer

requests for different frequencies to be shipped in 1-3

days. Programming features include a selectable

frequency table and up to 4 low-skew outputs.

• Up to 4 outputs can be low-skew

• Can include 8 selectable output frequencies

• Up to 5 reference outputs

• Replaces multiple crystals and oscillators

• Output frequencies up to 200 MHz at 3.3V

• Input crystal frequency of 5 - 27 MHz

• Input clock frequency of 2 - 50 MHz

• Duty cycle of 45/55

Using Phase-Locked-Loop (PLL) techniques, the

device runs from a standard fundamental mode,

inexpensive crystal, or clock. It can replace multiple

crystals and oscillators, saving board space and cost.

• Operating voltages of 3.3 V or 5 V

• Advanced, low power CMOS process

Block Diagram

CLK1

CLK2

OTP

ROM

with PLL

Divider

Values

S2:S0

PLLA

Divide

Logic

and

Output

Control

CLK3

CLK4

CLK5

CLK6

CLK7

PLLB

PLLC

PLLD

Crystal

or clock

input

X1/ICLK

Crystal

Oscillator

CLK8

CLK9

PDTS (all outputs and PLLs)

Capacitors are required with a crystal input.

MDS 388 B

Revision 051801

Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126•(408) 295-9800tel • www.icst.com

12 3 4 5

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