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ICM7610 PDF预览

ICM7610

更新时间: 2024-01-27 02:10:19
品牌 Logo 应用领域
ICMIC /
页数 文件大小 规格书
12页 222K
描述
12/10/8-Bit Low Power Voltage Output Quad DACs With Parallel Interface

ICM7610 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Contact Manufacturer零件包装代码:TSSOP
包装说明:TSSOP, TSSOP24,.25针数:24
Reach Compliance Code:unknown风险等级:5.45
最大模拟输出电压:5.5 V最小模拟输出电压:
转换器类型:D/A CONVERTER输入位码:BINARY
输入格式:PARALLEL, WORDJESD-30 代码:R-PDSO-G24
长度:6.5 mm最大线性误差 (EL):0.293%
位数:10功能数量:1
端子数量:24最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP24,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):NOT SPECIFIED电源:3/5 V
认证状态:Not Qualified座面最大高度:1.2 mm
标称安定时间 (tstl):8 µs子类别:Other Converters
最大压摆率:0.7 mA标称供电电压:3.6 V
表面贴装:YES温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4.4 mmBase Number Matches:1

ICM7610 数据手册

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ICM7620/7610/7600  
APPLICATIONS INFORMATION  
Power Supply Bypassing and Layout Considerations  
As in any precision circuit, careful consideration has to be given to layout of the supply and ground. The return path from the GND  
to the supply ground should be short with low impedance. Using a ground plane would be ideal. The supply should have some  
bypassing on it. A 10 µF tantalum capacitor in parallel with a 0.1 µF ceramic with a low ESR can be used. Ideally these would be  
placed as close as possible to the device. Avoid crossing digital and analog signals, specially the reference, or running them close  
to each other.  
Output Swing Limitations  
The ideal rail-to-rail DAC would swing from GND to VDD. However, offset and gain error limit this ability. Figure 1 illustrates how a  
negative offset error will affect the output. The output will limit close to ground since this is single supply part, resulting in a dead-  
band area. As a larger input is loaded into the DAC the output will eventually rise above ground. This is why the linearity is  
specified for a starting code greater than zero.  
Figure 2 illustrates how a gain error or positive offset error will affect the output when it is close to VDD. A positive gain error or  
positive offset will cause the output to be limited to the positive supply voltage resulting in a dead-band of codes close to full-scale.  
OFFSET AND  
GAIN ERROR  
VDD  
DEADBAND  
DEADBAND  
NEGATIVE  
OFFSET  
POSITIVE  
OFFSET  
Figure 1. Effect of Negative Offset  
Figure 2. Effect of Gain Error and Positive Offset  
8
Rev. A7  
ICmic reserves the right to change specifications without prior notice  

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