HY6264A Series
8Kx8bit CMOS SRAM
minimize current drain is unnecessary for the
HY6264A Series.
DESCRIPTION
FEATURES
The HY6264A is a high-speed, low power and
8,192x8-bits CMOS static RAM fabricated using
Hyundai's high performance twin tub CMOS
process technology. This high reliability process
coupled with innovative circuit design techniques,
yields maximum access time of 70ns. The
HY6264A has a data retention mode that
guarantees data to remain valid at the minimum
power supply voltage of 2.0 volt. Using the CMOS
technology, supply voltage from 2.0 to 5.5 volt
has little effect on supply current in the data
retention mode. Reducing the supply voltage to
·
·
·
·
Fully static operation and Tri-state outputs
TTL compatible inputs and outputs
Low power consumption
Battery backup(L/LL-part)
-2.0V(min.) data retention
Standard pin configuration
-28 pin 600 mil PDIP
·
-28 pin 330 mil SOP
Product
No.
HY6264A
Voltage
(V)
Speed
(ns)
70/85/100
Operation
Current(mA)
50
Standby Current(uA)
Temperature
(°C)
0~70(Normal)
L
100
LL
10
5.0
1mA
Note 1. Current value is max.
PIN CONNECTION
BLOCK DIAGRAM
ROW DECODER
I/O1
A0
Vcc
NC
A12
A7
1
2
28
27
26
25
24
23
22
21
20
19
18
17
16
15
NC
A12
A7
Vcc
/WE
CS2
A8
1
2
28
27
26
25
24
23
22
21
20
19
18
17
16
15
/WE
CS2
A8
3
3
A6
4
A6
4
A9
A5
5
A5
A9
5
MEMORY ARRAY
128x512
A4
A11
/OE
A10
/CS1
I/O8
I/O7
I/O6
I/O5
I/O4
6
A11
/OE
A10
/CS1
I/O8
I/O7
I/O6
I/O5
I/O4
A4
6
A3
7
A3
7
A2
8
A2
8
A1
A1
9
9
A0
10
11
12
13
14
A0
10
11
12
13
14
A12
I/O1
I/O2
I/O3
Vss
I/O8
I/O1
I/O2
I/O3
Vss
/CS1
CS2
/OE
PDIP
SOP
/WE
PIN DESCRIPTION
Pin Name
/CS1
Pin Function
Chip Select 1
Chip Select 2
Write Enable
Output Enable
Address Inputs
Pin Name
Pin Function
Data Input/Output
Power(+5V)
I/O1-I/O8
Vcc
CS2
/WE
Vss
Ground
/OE
NC
No Connect
A0-A12
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any
responsibility for use of circuits described. No patent licenses are implied.
Rev.02 /Jan.99
Hyundai Semiconductor