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HV9308PJ-G

更新时间： 2024-11-11 20:01:55
品牌 Logo 应用领域
超科 - SUPERTEX PC驱动接口集成电路
页数 文件大小 规格书
7页 604K
描述
EL Driver, 32-Segment, PQCC44, 0.653 X 0.653 INCH, 0.180 INCH HEIGHT, 0.05 INCH PITCH, MS-018AC, GREEN, PLASTIC, LCC-44

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HV9308PJ-G 技术参数

是否Rohs认证： 符合生命周期：Transferred
零件包装代码：LPCC包装说明：QCCJ,
针数：44Reach Compliance Code：unknown
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.66数据输入模式：SERIAL
接口集成电路类型：EL DISPLAY DRIVERJESD-30 代码：S-PQCC-J44
JESD-609代码：e3长度：16.5862 mm
复用显示功能：NO功能数量：1
区段数：32端子数量：44
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：QCCJ
封装形状：SQUARE封装形式：CHIP CARRIER
峰值回流温度（摄氏度）：NOT SPECIFIED认证状态：Not Qualified
座面最大高度：4.572 mm最大供电电压：5.5 V
最小供电电压：4.5 V电源电压1-最大：80 V
电源电压1-分钟：8 V表面贴装：YES
温度等级：INDUSTRIAL端子面层：Matte Tin (Sn)
端子形式：J BEND端子节距：1.27 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：16.5862 mm最小 fmax：8 MHz
Base Number Matches：1

HV9308PJ-G 数据手册

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Supertex inc.  
HV9308  
32-Channel Serial to Parallel Converter  
With High Voltage Push-Pull Outputs  
Features  
General Description  
► Processed with HVCMOS® technology  
► Low power level shifting  
The HV9308 is a low voltage serial to high voltage parallel  
converters with push-pull outputs. This device has been designed  
for use as a driver for AC-electroluminescent displays. It can also  
be used in any application requiring multiple output, high voltage  
current sourcing and sinking capabilities such as driving plasma  
panels, vacuum fluorescent, or large matrix LCD displays.  
► Shift register speed 8.0MHz  
► Latched data outputs  
► 5.0V CMOS compatible inputs  
► Forward and reverse shifting options  
► Diode to VPP allows efficient power recovery  
These devices consist of a 32-bit shift register, 32 latches, and  
control logic to enable outputs. HVOUT1 is connected to the first  
stage of the shift register through the Output Enable logic. Data is  
shifted through the shift register on the low to high transition of the  
clock. The HV9308 shifts in the clockwise direction when viewed  
from the top of the package. A data output buffer is provided for  
cascading devices. This output reflects the current status of the  
last bit of the shift register (32). Operation of the shift register is  
not affected by the LE (latch enable) or the OE (output enable)  
inputs. Transfer of data from the shift register to the latch occurs  
when the LE input is high. The data in the latch is retained when  
LE is low.  
Block Diagram  
Output Enable  
Latch Enable  
VPP  
DATA INPUT  
HVOUT  
1
CLOCK  
HVOUT2  
•
•
•
32 bit  
Static Shift  
Register  
32 Latches  
32 Outputs Total  
•
•
•
HVOUT31  
DATA OUT  
HVOUT32  
Doc.# DSFP-HV9308  
B061713  
Supertex inc.  
www.supertex.com  
1234567

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