Datasheet > HSP43891GC-25

HSP43891GC-25

更新时间： 2024-11-13 22:09:47

品牌	Logo	应用领域
英特矽尔 - INTERSIL		外围集成电路 LTE 时钟
页数	文件大小	规格书
18页	145K
描述
Digital Filter

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HSP43891GC-25 数据手册

HSP43891

Data Sheet

May 1999

File Number 2785.5

Digital Filter

Features

The HSP43891 is a video-speed Digital Filter (DF)

designed to efficiently implement vector operations such as

FIR digital filters. It is comprised of eight filter cells

cascaded internally and a shift and add output stage, all in

a single integrated circuit. Each filter cell contains a 9x9

two’s complement multiplier, three decimation registers and

a 26-bit accumulator. The output stage contains an

additional 26-bit accumulator which can add the contents of

any filter cell accumulator to the output stage accumulator

shifted right by 8-bits. The HSP43891 has a maximum

sample rate of 30MHz. The effective multiply-accumulate

(mac) rate is 240MHz.

• Eight Filter Cells

• 0MHz to 30MHz Sample Rate

• 9-Bit Coefﬁcients and Signal Data

• 26-Bit Accumulator per Stage

• Filter Lengths Over 1000 Taps

• Expandable Coefficient Size, Data Size and Filter Length

• Decimation by 2, 3 or 4

Applications

• 1-D and 2-D FIR Filters

• Radar/Sonar

The HSP43891 DF can be configured to process expanded

coefficient and word sizes. Multiple DFs can be cascaded

for larger filter lengths without degrading the sample rate or

a single DF can process larger filter lengths at less than

30MHz with multiple passes. The architecture permits

processing filter lengths of over 1000 taps with the

guarantee of no overflows. In practice, most filter

coefficients are less than 1.0, making even larger filter

lengths possible. The DF provides for 8-bit unsigned or

9-bit two’s complement arithmetic, independently

selectable for coefficients and signal data.

• Digital Video

• Adaptive Filters

• Echo Cancellation

• Complex Multiply-Add

- Sample Rate Converters

Ordering Information

TEMP.

PART NUMBER RANGE ( C)

PACKAGE

PKG. NO.

HSP43891VC-20

HSP43891VC-25

HSP43891VC-30

HSP43891JC-20

HSP43891JC-25

HSP43891JC-30

HSP43891GC-20

HSP43891GC-25

HSP43891GC-30

0 to 70

100 Lead MQFP Q100.14x20

84 Lead PLCC N84.1.15

85 Pin CPGA G85.A

Each DF ﬁlter cell contains three resampling or decimation

registers which permit output sample rate reduction at rates

of / , / or / the input sample rate. These registers also

provide the capability to perform 2-D operations such as

matrix multiplication and NxN spatial

correlations/convolutions for image processing applications.

85 Pin CPGA G85.A

Block Diagram

DIN0 - DIN8

DIENB

CIENB

DCM0 - 1

ERASE

FILTER

CELL 0

FILTER

CELL 1

FILTER

CELL 2

FILTER

CELL 3

FILTER

CELL 4

FILTER

CELL 5

FILTER

CELL 6

FILTER

CELL 7

CIN0 - 8

COUT0 - 8

COENB

RESET

CLK

ADRO - 2

MUX

RESET

CLK

ADR0, ADR1, ADR2

OUTPUT

STAGE

SHADD

SENBL

SENBH

SUM0 - 25

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

12 3 4 5 6 7...18

中文翻译

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与HSP43891GC-25相关器件

型号	品牌	获取价格	描述	数据表
HSP43891GC-30	INTERSIL	获取价格	Digital Filter
HSP43891GM-20/883	INTERSIL	获取价格	Digital Filter
HSP43891GM-25/883	INTERSIL	获取价格	Digital Filter
HSP43891JC-20	INTERSIL	获取价格	Digital Filter
HSP43891JC-25	INTERSIL	获取价格	Digital Filter
HSP43891JC-30	INTERSIL	获取价格	Digital Filter
HSP43891QM-20/883	RENESAS	获取价格	IC,DIGITAL FILTER,CMOS,QFL,84PIN,CERAMIC
HSP43891VC-20	INTERSIL	获取价格	Digital Filter
HSP43891VC-25	INTERSIL	获取价格	Digital Filter
HSP43891VC-30	INTERSIL	获取价格	Digital Filter

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