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HMADC9225NZG PDF预览

HMADC9225NZG

更新时间: 2024-01-02 08:31:50
品牌 Logo 应用领域
霍尼韦尔 - HONEYWELL 转换器
页数 文件大小 规格书
11页 4897K
描述
ADC, Proprietary Method

HMADC9225NZG 技术参数

生命周期:Active包装说明:,
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.65转换器类型:ADC, PROPRIETARY METHOD
输出位码:OFFSET BINARYBase Number Matches:1

HMADC9225NZG 数据手册

 浏览型号HMADC9225NZG的Datasheet PDF文件第1页浏览型号HMADC9225NZG的Datasheet PDF文件第2页浏览型号HMADC9225NZG的Datasheet PDF文件第3页浏览型号HMADC9225NZG的Datasheet PDF文件第5页浏览型号HMADC9225NZG的Datasheet PDF文件第6页浏览型号HMADC9225NZG的Datasheet PDF文件第7页 
Output Enable Timing Diagram  
OE  
Bit 1 – Bit 12  
TDLZ  
TDHZ  
TDZL  
TDZH  
Switching Specifications  
(AVDD = +5V, DRVDD = +5V)  
Parameter  
Symbol  
Min  
50  
23  
23  
3
Typ  
Max  
Units  
ns  
Clock Period (1)  
tC  
Clock Pulsewidth High (46% of tC) (1)  
Clock Pulsewidth Low (46% of tC) (1)  
Output Delay  
tCH  
tCL  
tOD  
ns  
ns  
25  
ns  
High Z to Output High (DRVDD=5V) (2)  
High Z to Output Low (DRVDD=5V) (2)  
Output High to High Z (DRVDD=5V) (2)  
Output Low to High Z (DRVDD=5V) (2)  
High Z to Output High (DRVDD=3.3V) (2)  
High Z to Output Low (DRVDD=3.3V) (2)  
Output High to High Z (DRVDD=3.3V) (2)  
Output Low to High Z (DRVDD=3.3V) (2)  
TDZH_50  
TDZL_50  
TDHZ_50  
TDLZ_50  
TDZH_33  
TDZL_33  
TDHZ_33  
TDLZ_33  
25  
25  
25  
25  
25  
25  
25  
25  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
(1) These are parameters of the input clock signal to the chip.  
(2) Refer to “Output Enable Timing Diagram” for waveform.  
Radiation Specifications  
Parameter  
Limit  
Units  
Total Dose Hardness  
Single Event Latchup (1)  
Soft Error Rate  
5 x 105  
rad(Si)  
MeV-cm2/mg  
120  
See note (2)  
1 x 1012  
Dose Rate Survivability  
rad(Si)/s  
N/cm2  
Neutron (3)  
1 x 1013  
(1) The SOI CMOS technology is immune to latchup.  
(2) In a particle radiation environment, output code errors may occasionally occur. These  
are temporary and normal operation will resume on subsequent clock cycles.  
(3) 1MeV equivalent energy, Unbiased.