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HM628512BLTT-7UL

更新时间： 2024-02-23 09:38:37

品牌	Logo	应用领域
日立 - HITACHI		静态存储器
页数	文件大小	规格书
18页	87K
描述
4 M SRAM (512-kword x 8-bit)

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数据手册

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HM628512BLTT-7UL 数据手册

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HM628512B Series

AC Characteristics (Ta = –20 to +70°C, V_CC= 5 V ± 10%, unless otherwise noted.)

Test Conditions

•

Input pulse levels: 0.8 V to 2.4 V

Input rise and fall time: 5 ns

Input and output timing reference levels: 1.5 V

Output load: 1 TTL Gate + C_L(100 pF) (HM628512B-7)

1 TTL Gate + C_L(50 pF) (HM628512B-5)

(Including scope & jig)

Read Cycle

HM628512B

-5

-7

Min

—

Parameter

Symbol

t_RC

Min

—

Max

—

Max

—

Unit

Notes

Read cycle time

Address access time

t_AA

—

Chip select access time

t_CO

Output enable to output valid

Chip selection to output in low-Z

Output enable to output in low-Z

Chip deselection to output in high-Z

Output disable to output in high-Z

Output hold from address change

t_OE

t_LZ

t_OLZ

t_HZ

t_OHZ

t_OH

—

1, 2

1...4 5 678 9 10...18

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