Datasheet > HIP2104FRAANZ

HIP2104FRAANZ

更新时间： 2024-11-16 12:18:27

品牌	Logo	应用领域
英特矽尔 - INTERSIL		驱动器
页数	文件大小	规格书
21页	504K
描述
60V, 1A/2A Peak, 1/2 Bridge Driver with 4V UVLO

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HIP2104FRAANZ 数据手册

60V, 1A/2A Peak, 1/2 Bridge Driver with 4V UVLO

HIP2103, HIP2104

The HIP2103 and HIP2104 are half bridge drivers designed for

applications using DC motors, three-phase brushless DC

motors, or other similar loads.

Features

• 60V maximum bootstrap supply voltage

• 3.3V and 12V LDOs with dedicated enable pins (HIP2104)

• 5µA sleep mode quiescent current

Two inputs (HI and LI) are provided to independently control

the high side driver (HO) and the low side driver (LO).

Furthermore, the two inputs can be configured to

enable/disable the device, thus lowering the number of

connections to a microcontroller and lowering costs.

• 4V undervoltage lockout

• 3.3V or 5V CMOS compatible inputs with hysteresis

• Integrated bootstrap FET (replaces traditional boot strap diode)

Applications

The very low IDD bias current in the Sleep Mode prevents

battery drain when the device is not in use, thus eliminating

the need for an external switch to disconnect the driver from

the battery.

• Half bridge, full bridge and BLDC motor drives

(see Figures 21, 22, 23)

• UPS and inverters

A fail-safe mechanism is included to improve system reliability

and to minimize the possibility of catastrophic bridge failures

due to controller malfunction. Internal logic prevents both

outputs from turning on simultaneously when HI and LI are

both high simultaneously. Dead-time is still required on the

rising edge of the HI (or LI) input when the LI (or HI) input

transitions low.

• Class-D amplifiers

• Any switch mode power circuit requiring a half bridge driver

Related Literature

• AN1896 “HIP2103, HIP2104 Evaluation Board User’s Guide”

• AN1899 “HIP2103, HIP2104 3-phase, Full or Half Bridge

Motor Drive”

Integrated pull-down resistors on all of the inputs (LI, HI, VDen

and VCen) reduces the need for external resistors. An active

low resistance pull-down on the LO output ensures that the low

side bridge FET remains off during the Sleep Mode or when

VDD is below the undervoltage lockout (UVLO) threshold.

The HIP2104 has a 12V linear regulator and a 3.3V linear

regulator with separate enable pins. The 12V regulator

provides internal bias for VDD and the 3.3V regulator provides

bias for an external microcontroller (and/or other low voltage

ICs), thus eliminating the need for discrete LDOs or DC/DC

converters.

The HIP2103 is available in a 3x3mm, 8 Ld TDFN package and

the HIP2104 is available in a 4x4mm, 12 Ld DFN package.

5.5

5.0

VBAT

VDen

VCen

VCC

4.5

4.0

3.5

VDD

HIP2104

HIP2103

MOTOR

µController

3.0

2.5

2.0

VSS

EPAD

(VDC)

BAT

FIGURE 1. TYPICAL FULL BRIDGE APPLICATION

FIGURE 2. HIP2104 SHUTDOWN CURRENT vs V

BAT

November 27, 2013

FN8276.0

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.

All other trademarks mentioned are the property of their respective owners.

12 3 4 5 6 7...21

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与HIP2104FRAANZ相关器件

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HIP2106IB	INTERSIL	获取价格	100V/1A Peak, Low Cost, High Frequency Half Bridge Driver
HIP2106IBT	RENESAS	获取价格	1A HALF BRDG BASED MOSFET DRIVER, PDSO8, PLASTIC, MS-012-AA, SOIC-8
HIP2106IP	INTERSIL	获取价格	100V/1A Peak, Low Cost, High Frequency Half Bridge Driver
HIP2120	INTERSIL	获取价格	100V, 2A Peak, High Frequency Half-Bridge Drivers with Adjustable Dead Time Control and PW
HIP2120FRTAZ	INTERSIL	获取价格	100V, 2A Peak, High Frequency Half-Bridge Drivers with Adjustable Dead Time Control and PW
HIP2120FRTBZ	INTERSIL	获取价格	100V, 2A Peak, High Frequency Half-Bridge Drivers with Adjustable Dead Time Control and PW

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