HI7188
8-Channel, 16-Bit, High Precision,
Sigma-Delta A/D Sub-System
August 1997
Features
Description
• Fully Differential 8-Channel Multiplexer and Reference The HI7188 is an easy-to-use 8-Channel sigma-delta pro-
grammable A/D subsystem ideal for low frequency physical
and electrical measurements in scientific, medical, and
• Automatic Channel Switching with Zero Latency
industrial applications. The subsystem has complete on-chip
capabilities to support moving the intelligence from the sys-
tem controller and towards the sensors. This gives the
designer faster and more flexible configurability without the
traditional drawbacks of low throughput per channel, higher
power or cost per channel. Extreme design complexity and
excessive software overhead is eliminated.
• 240 Conversions Per Second Per Channel
• 16-Bit Resolution with No Missing Codes
• 0.0015% Integral Non-Linearity
• Fully Software Configurable
- -120dB Rejection of 60/50Hz Line Noise
- Channel Conversion Order and Number of Active
Channels
The HI7188 contains a fully differential 8 channel multiplexer,
Programmable Gain Instrumentation Amplifier (PGIA), 4th
order sigma-delta ADC, integrating filter, line noise rejection
filters, calibration and data RAMs, clock oscillator, and a
microsequencer. Communication with the HI7188 is per-
formed via the serial I/O port, and is compatible with most
synchronous transfer formats, including both the Motor-
ola/Intersil 6805/11 series SPI, QSPI and Intel 8051 series
SSR protocols.
- True Bipolar or Unipolar Input Range Per Channel
- PGIA Gain Per Channel
- 2-Wire or 3-Wire Interface
• Chopper Stabilized PGIA with Gains of 1 to 8
• Serial Data I/O Interface, SPI Compatible
• 3 Point System Calibration
The powerful on-board microsequencer provides automatic
conversions on the multiplexed input channels (up to 8) by
controlling all channel switching, filtering and calibration. The
microsequencer supports on-the-fly multiplexer reconfigura-
tion, forty to fifty times faster throughput than the competition
and zero step response delay during internal or external
multiplexer channel changes. A simple set of commands
gives the user control over calibration, PGIA gain, and bipo-
lar/unipolar modes on a per channel basis. Number of chan-
nels to convert, data coding, line noise rejection, etc. is
programmed at the chip level. The calibration RAMs allow
the user to read and write system calibration data while the
data RAMs provide a read support of the conversion results
for each channel.
• Low Power Dissipation of 30mW (Typ)
Applications
• Multi-Channel Industrial Process Controls
• Weight Scales
• Medical Patient Monitoring
• Laboratory Instrumentation
• Gas Monitoring System
• Reference Literature
- AN9504 “A Brief Introduction to Sigma Delta
Conversion”
This design is effectively eight 16-bit (for 96dB noise-free
dynamic range) Sigma-Delta A/D converters combined with
a microsequencer and an eight-channel multiplexer in a sin-
gle package. The HI7188 provides 120dB line-noise rejec-
tion at 240 samples/second/channel (in 60Hz line-rejection
mode) and 200 samples/second/channel (in 50Hz line-rejec-
tion mode) base output data rates. By reusing multiplexer
channels for the same input, throughput can increase by
integer increments of the base output data rate up to
1920Hz.
- TB329 “Intersil Sigma-Delta Calibration Tech-
niques”
- AN9518 “Using the HI7188 Evaluation Kit”
- AN9610 “Interfacing the HI7188 to a Microcontroller”
- AN9538 “Using the HI7188 Serial Interface”
Ordering Information
PART
NUMBER
TEMP.
o
RANGE ( C)
-40 to 85
-40 to 85
25
PACKAGE
40 Ld PDIP
PKG. NO.
E40.6
Q44.10x10
HI7188IP
HI7188IN
44 Ld MQFP
Evaluation Kit
HI7188EVAL
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
File Number 4016.4
7-1847
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