Datasheet > HEF4081BT-Q100J

HEF4081BT-Q100J

更新时间： 2024-11-04 19:27:35

品牌	Logo	应用领域
恩智浦 - NXP		光电二极管逻辑集成电路
页数	文件大小	规格书
11页	95K
描述
HEF4081B-Q100 - Quad 2-input AND gate SOIC 14-Pin

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HEF4081BT-Q100J 技术参数

生命周期：	Transferred	零件包装代码：	SOIC
包装说明：	3.90 MM, PLASTIC, MS-012, SOT108-1, SOP-14	针数：	14
Reach Compliance Code：	unknown	风险等级：	5.78
Base Number Matches：	1

HEF4081BT-Q100J 数据手册

HEF4081B-Q100

Quad 2-input AND gate

Rev. 1 — 13 November 2013

Product data sheet

1. General description

The HEF4081B-Q100 is a quad 2-input AND gate. The outputs are fully buffered for

highest noise immunity and pattern insensitivity to output impedance variations.

It operates over a recommended V_DDpower supply range of 3 V to 15 V referenced to V_SS

(usually ground). Unused inputs must be connected to V_DD, V_SS, or another input.

This product has been qualified to the Automotive Electronics Council (AEC) standard

Q100 (Grade 1) and is suitable for use in automotive applications.

2. Features and benefits

 Automotive product qualification in accordance with AEC-Q100 (Grade 1)

 Specified from 40 C to +85 C and from 40 C to +125 C

 Fully static operation

 5 V, 10 V, and 15 V parametric ratings

 Standardized symmetrical output characteristics

 Inputs and outputs are protected against electrostatic effects

 ESD protection:

 MIL-STD-883, method 3015 exceeds 2000 V

 HBM JESD22-A114F exceeds 2000 V

 MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )

 Complies with JEDEC standard JESD 13-B

3. Ordering information

Table 1.

Ordering information

All types operate from 40 C to +125 C.

Type number

Package

Name

Description

Version

HEF4081BT-Q100

SO14

plastic small outline package; 14 leads; body width 3.9 mm

SOT108-1

12 3 4 5 6 7...11

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