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HD74LS390RP-EL PDF预览

HD74LS390RP-EL

更新时间: 2024-11-23 13:08:19
品牌 Logo 应用领域
瑞萨 - RENESAS 计数器
页数 文件大小 规格书
6页 172K
描述
LS SERIES, ASYN NEGATIVE EDGE TRIGGERED 3-BIT UP DECADE COUNTER, PDSO16, FP-16DN

HD74LS390RP-EL 技术参数

生命周期:Contact Manufacturer零件包装代码:SOIC
包装说明:FP-16DN针数:16
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.33Is Samacsys:N
其他特性:DIVIDE BY 2 AND DIVIDE BY 5 FUNCTIONS计数方向:UP
系列:LSJESD-30 代码:R-PDSO-G16
长度:9.9 mm负载/预设输入:YES
逻辑集成电路类型:DECADE COUNTER工作模式:ASYNCHRONOUS
位数:3功能数量:4
端子数量:16封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE传播延迟(tpd):60 ns
认证状态:Not Qualified座面最大高度:1.75 mm
标称供电电压 (Vsup):5 V表面贴装:YES
技术:TTL温度等级:COMMERCIAL EXTENDED
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL触发器类型:NEGATIVE EDGE
宽度:3.9 mm最小 fmax:25 MHz
Base Number Matches:1

HD74LS390RP-EL 数据手册

 浏览型号HD74LS390RP-EL的Datasheet PDF文件第2页浏览型号HD74LS390RP-EL的Datasheet PDF文件第3页浏览型号HD74LS390RP-EL的Datasheet PDF文件第4页浏览型号HD74LS390RP-EL的Datasheet PDF文件第5页浏览型号HD74LS390RP-EL的Datasheet PDF文件第6页 
HD74LS390  
Dual Decade Counters  
REJ03D0485-0400  
Rev.4.00  
May 10, 2006  
This circuit contains eight master-slave flip-flops and additional gating to implement two individual four-bit counters.  
The HD74LS390 incorporates dual divide-by-two and divide-by-five counters, which can be used to implement cycle  
lengths equal to any whole and / or cumulative multiples of 2 and / or 5 up to divide-by-100. When connected as a bi-  
quinary counter, the separate divide-by-two circuit can be used to provide symmetry (a square wave) at the final output  
stage.  
Features  
Ordering Information  
Package Code  
(Previous Code)  
Package  
Abbre
Taping Abbreviation  
(Quantity)  
Part Name  
Package Type  
DILP-16 pin  
PRDP0016AE-B  
(DP-16FV)  
HD74LS390P  
HD74LS390FPEL  
P
PRSP0016DH-B  
(FP-16DAV)  
SOP-16 pin (JEITA)  
L (2,000 pcs/reel)  
Note: Please consult the sales office for the above package
Pin Arrangement  
7
8
16  
15  
14  
13  
12  
11  
10  
9
1A  
VCC  
1Cle
2A  
2Clear  
CLR  
2Q  
2A  
2Q  
Output  
A
A
1Q  
1Q  
1Q  
B
C
D
2B  
2B  
2QB  
Output
2Q  
2Q  
2Q  
B
C
D
2Q  
C
D
1Q  
Outputs  
2Q  
GND  
(Top view)  
Rev.4.00, May 10, 2006, page 1 of 5  

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