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HD74LS273RPEL PDF预览

HD74LS273RPEL

更新时间: 2024-11-12 05:35:15
品牌 Logo 应用领域
瑞萨 - RENESAS 触发器锁存器逻辑集成电路光电二极管
页数 文件大小 规格书
7页 98K
描述
Octal D-type Positive-edge-triggered Flip-Flops (with Clear)

HD74LS273RPEL 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:SOIC
包装说明:SOP, SOP20,.4针数:20
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.35Is Samacsys:N
系列:LSJESD-30 代码:R-PDSO-G20
长度:12.8 mm逻辑集成电路类型:D FLIP-FLOP
最大频率@ Nom-Sup:30000000 Hz最大I(ol):0.008 A
湿度敏感等级:1位数:8
功能数量:1端子数量:20
最高工作温度:75 °C最低工作温度:-20 °C
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP20,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:5 V最大电源电流(ICC):27 mA
传播延迟(tpd):27 ns认证状态:Not Qualified
座面最大高度:2.65 mm子类别:FF/Latches
最大供电电压 (Vsup):5.25 V最小供电电压 (Vsup):4.75 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:TTL温度等级:COMMERCIAL EXTENDED
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:7.5 mm
最小 fmax:30 MHzBase Number Matches:1

HD74LS273RPEL 数据手册

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HD74LS273  
Octal D-type Positive-edge-triggered Flip-Flops (with Clear)  
REJ03D0473–0300  
Rev.3.00  
Jul.15.2005  
The HD74LS273, positive-edge-triggered flip-flops utilize LS TTL circuitry to implement D-type flip-flop logic with a  
direct clear input.  
Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going  
edge of the clock pulse.  
When the clock input is at either the high or low level, the D input signal has no effect at the output.  
Features  
Ordering Information  
Package Code  
(Previous Code)  
Package  
Abbreviation  
Taping Abbreviation  
(Quantity)  
Part Name  
Package Type  
DILP-20 pin  
PRDP0020AC-B  
(DP-20NEV)  
HD74LS273P  
P
PRSP0020DD-B  
(FP-20DAV)  
HD74LS273FPEL SOP-20 pin (JEITA)  
HD74LS273RPEL SOP-20 pin (JEDEC)  
FP  
RP  
EL (2,000 pcs/reel)  
EL (1,000 pcs/reel)  
PRSP0020DC-A  
(FP-20DBV)  
Note: Please consult the sales office for the above package availability.  
Pin Arrangement  
1
2
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
Clear  
1Q  
VCC  
Q
D
Q
D
8Q  
8D  
Clear  
CK  
Clear  
CK  
3
1D  
4
2D  
D
Q
CK  
Clear  
CK  
Clear  
D
Q
7D  
5
2Q  
7Q  
6Q  
6D  
6
3Q  
Q
D
Q
D
Clear  
CK  
Clear  
CK  
7
3D  
8
4D  
5D  
D
Q
CK  
Clear  
CK  
Clear  
D
Q
9
4Q  
5Q  
Clock  
10  
GND  
(Top view)  
Rev.3.00, Jul.15.2005, page 1 of 6  

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