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HD74LS273RP-EL PDF预览

HD74LS273RP-EL

更新时间: 2024-11-12 12:58:15
品牌 Logo 应用领域
瑞萨 - RENESAS 触发器
页数 文件大小 规格书
7页 98K
描述
LS SERIES, D FLIP-FLOP, PDSO20, FP-20DB

HD74LS273RP-EL 技术参数

是否Rohs认证:符合生命周期:Active
零件包装代码:SOIC包装说明:FP-20DB
针数:20Reach Compliance Code:unknown
风险等级:5.19Is Samacsys:N
系列:LSJESD-30 代码:R-PDSO-G20
长度:12.8 mm逻辑集成电路类型:D FLIP-FLOP
端子数量:20封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE认证状态:Not Qualified
座面最大高度:2.65 mm表面贴装:YES
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL宽度:7.5 mm
Base Number Matches:1

HD74LS273RP-EL 数据手册

 浏览型号HD74LS273RP-EL的Datasheet PDF文件第2页浏览型号HD74LS273RP-EL的Datasheet PDF文件第3页浏览型号HD74LS273RP-EL的Datasheet PDF文件第4页浏览型号HD74LS273RP-EL的Datasheet PDF文件第5页浏览型号HD74LS273RP-EL的Datasheet PDF文件第6页浏览型号HD74LS273RP-EL的Datasheet PDF文件第7页 
HD74LS273  
Octal D-type Positive-edge-triggered Flip-Flops (with Clear)  
REJ03D0473–0300  
Rev.3.00  
Jul.15.2005  
The HD74LS273, positive-edge-triggered flip-flops utilize LS TTL circuitry to implement D-type flip-flop logic with a  
direct clear input.  
Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going  
edge of the clock pulse.  
When the clock input is at either the high or low level, the D input signal has no effect at the output.  
Features  
Ordering Information  
Package Code  
(Previous Code)  
Package  
Abbreviation  
Taping Abbreviation  
(Quantity)  
Part Name  
Package Type  
DILP-20 pin  
PRDP0020AC-B  
(DP-20NEV)  
HD74LS273P  
P
PRSP0020DD-B  
(FP-20DAV)  
HD74LS273FPEL SOP-20 pin (JEITA)  
HD74LS273RPEL SOP-20 pin (JEDEC)  
FP  
RP  
EL (2,000 pcs/reel)  
EL (1,000 pcs/reel)  
PRSP0020DC-A  
(FP-20DBV)  
Note: Please consult the sales office for the above package availability.  
Pin Arrangement  
1
2
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
Clear  
1Q  
VCC  
Q
D
Q
D
8Q  
8D  
Clear  
CK  
Clear  
CK  
3
1D  
4
2D  
D
Q
CK  
Clear  
CK  
Clear  
D
Q
7D  
5
2Q  
7Q  
6Q  
6D  
6
3Q  
Q
D
Q
D
Clear  
CK  
Clear  
CK  
7
3D  
8
4D  
5D  
D
Q
CK  
Clear  
CK  
Clear  
D
Q
9
4Q  
5Q  
Clock  
10  
GND  
(Top view)  
Rev.3.00, Jul.15.2005, page 1 of 6  

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