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HD74LS258 PDF预览

HD74LS258

更新时间: 2024-11-12 05:35:15
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瑞萨 - RENESAS 复用器
页数 文件大小 规格书
7页 173K
描述
Quadruple 2-line-to-1-line Data Selectors / Multiplexers (with three-state outputs)

HD74LS258 数据手册

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HD74LS258  
Quadruple 2-line-to-1-line Data Selectors / Multiplexers  
(with three-state outputs)  
REJ03D0470–0300  
Rev.3.00  
Jul.15.2005  
This multiplexer features three-state outputs that can interface directly with and drive data lines of bus-organized  
systems. With all but one of the common outputs disabled (at a high-impedance state) the low impedance of the single  
enabled output will drive the bus line to a high or low logic level.  
To minimize the possibility that two outputs will attempt to take a common bus to opposite logic levels, the output-  
enable circuitry is designed such that the output disable times are shorter than the output enable times.  
Features  
Ordering Information  
Package Code  
(Previous Code)  
Pa
Taping Abbreviation  
uantity)  
Part Name  
Package Type  
PRSP0016DH-B  
(FP-16DAV)  
HD74LS258FPEL  
SOP-16 pin (JEITA)  
EL (2,000 pcs/reel)  
Pin Arrangement  
1
7
8
16  
15  
14  
13  
12  
11  
10  
9
Select  
1A  
VCC  
Output  
Control  
Inputs  
4A  
4B  
4A  
Inputs  
4B  
2A  
4Y  
4Y Output  
2B  
2Y  
3A  
3B  
3A  
Inputs  
3B  
Outpu
GND  
3Y  
3Y Output  
(Top view)  
Rev.3.00, Jul.15.2005, page 1 of 6  

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