Datasheet > 逻辑 > 计数器> HD74LS163AP

HD74LS163AP

更新时间： 2024-09-21 05:35:15

品牌	Logo	应用领域
瑞萨 - RENESAS		计数器触发器逻辑集成电路光电二极管
页数	文件大小	规格书
12页	199K
描述
Synchronous 4-bit Binary Counter (direct clear)

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技术参数
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HD74LS163AP 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	DIP	包装说明：	6.30 X 19.20 MM, 2.54 MM PITCH, PLASTIC, DIP-16
针数：	16	Reach Compliance Code：	compliant
HTS代码：	8542.39.00.01	风险等级：	5.32
Is Samacsys：	N	计数方向：	UP
系列：	LS	JESD-30 代码：	R-PDIP-T16
JESD-609代码：	e4	长度：	19.2 mm
负载/预设输入：	YES	逻辑集成电路类型：	BINARY COUNTER
最大频率@ Nom-Sup：	25000000 Hz	最大I（ol）：	0.008 A
工作模式：	SYNCHRONOUS	位数：	4
功能数量：	1	端子数量：	16
最高工作温度：	75 °C	最低工作温度：	-20 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	DIP
封装等效代码：	DIP16,.3	封装形状：	RECTANGULAR
封装形式：	IN-LINE	电源：	5 V
最大电源电流（ICC）：	32 mA	传播延迟（tpd）：	27 ns
认证状态：	Not Qualified	座面最大高度：	5.06 mm
子类别：	Counters	最大供电电压 (Vsup)：	5.25 V
最小供电电压 (Vsup)：	4.75 V	标称供电电压 (Vsup)：	5 V
表面贴装：	NO	技术：	TTL
温度等级：	COMMERCIAL EXTENDED	端子面层：	NICKEL PALLADIUM GOLD
端子形式：	THROUGH-HOLE	端子节距：	2.54 mm
端子位置：	DUAL	触发器类型：	POSITIVE EDGE
宽度：	7.62 mm	最小 fmax：	25 MHz
Base Number Matches：	1

HD74LS163AP 数据手册

HD74LS163A

Synchronous 4-bit Binary Counter (direct clear)

REJ03D0447–0200

Rev.2.00

Feb.18.2005

This synchronous 4-bit binary counter features an internal carry look-ahead for application in high-speed counting

designs. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs changes

coincident with each other when so instructed by the count-enable inputs and internal gating. This mode of operation

eliminates the output counting spikes that are normally associated with asynchronous (ripple clock) counters. A

buffered clock input triggers the four flip-flops on the rising (positive-going) edge of the clock input waveform. This

counter is fully programmable; that is, the output may be preset to either level. As presetting is synchronous, setting up

a low level at the load input disables the counter and causes the outputs to agree with the setup data after the next clock

pulse regardless of the levels of the enable inputs. Low-to-high transitions at the load input would be avoided when the

clock is low if the enable inputs are high at or before the transition. The clear function is asynchronous and a low level

at the clear input sets all four of the flip-flop outputs low after the next clock pulse, regardless of the levels of the enable

inputs. This synchronous clear allows the count length to be modified easily as decoding the maximum count desired

can be accomplished with one external NAND gate. The gate output is connected to the clear input to synchronously

clear the counter to LLLL. Low-to-high transitions at the clear input should be avoided when the clock is low if the

enable and load inputs are high at or before the transition. The carry look-ahead circuitry provides for cascading

counters for n-bit synchronous applications without additional getting. Instrumental in accomplishing this function are

two count-enable inputs and a ripple carry output. Both count-enable inputs (P and T) must be high to count, and input

T is fed forward to enable the ripple carry output. The ripple carry output thus enabled will produce a high-level output

pulse with a duration approximately equal to the high-level portion of the Q_Aoutput. This high-level overflow ripple

carry pulse can be used to enable successive cascaded stages. High-to-low-level transitions at the enable P or T inputs

should occur only when the clock input is high.

Features

•

Ordering Information

Package Code

(Previous Code)

Package

Abbreviation

Taping Abbreviation

(Quantity)

Part Name

Package Type

PRDP0016AE-B

(DP-16FV)

HD74LS163AP

HD74LS163AFPEL

HD74LS163ARPEL

DILP-16 pin

—

PRSP0016DH-B

(FP-16DAV)

SOP-16 pin (JEITA)

SOP-16 pin (JEDEC)

EL (2,000 pcs/reel)

EL (2,500 pcs/reel)

PRSP0016DG-A

(FP-16DNV)

Note: Please consult the sales office for the above package availability.

Rev.2.00, Feb.18.2005, page 1 of 11

12 3 4 5 6 7...12

中文翻译

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与HD74LS163AP相关器件

型号	品牌	获取价格	描述	数据表
HD74LS163AP-E	RENESAS	获取价格	LS SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, PDIP16, 6.30 X 19.20 MM, 2
HD74LS163ARP	ETC	获取价格	COUNTER\|UP\|4-BIT BINARY\|LS-TTL\|TSSOP\|16PIN\|PLASTIC
HD74LS163ARPEL	RENESAS	获取价格	Synchronous 4-bit Binary Counter (direct clear)
HD74LS163ARP-EL	HITACHI	获取价格	暂无描述
HD74LS163P	ETC	获取价格	Synchronous Up Counter
HD74LS164	HITACHI	获取价格	8-Bit Parallel-Out Serial-In Shift Registers
HD74LS164	RENESAS	获取价格	8-Bit Parallel-Out Serial-in Shift Register
HD74LS164FP	RENESAS	获取价格	LS SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO14, FP-14DA
HD74LS164FP	HITACHI	获取价格	Serial In Parallel Out, LS Series, 8-Bit, Right Direction, True Output, TTL, PDSO14, EIAJ,
HD74LS164FPEL	RENESAS	获取价格	8-Bit Parallel-Out Serial-in Shift Register

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