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HD74LS145RPEL PDF预览

HD74LS145RPEL

更新时间: 2024-11-08 11:04:43
品牌 Logo 应用领域
瑞萨 - RENESAS 解码器驱动器逻辑集成电路光电二极管
页数 文件大小 规格书
7页 85K
描述
BCD-to-Decimal Decoder / Driver (with 15 V outputs)

HD74LS145RPEL 技术参数

是否Rohs认证:符合生命周期:Active
零件包装代码:SOIC包装说明:3.95 X 9.90 MM, 1.27 MM PITCH, PLASTIC, SOP-16
针数:16Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.14Is Samacsys:N
系列:LS输入调节:STANDARD
JESD-30 代码:R-PDSO-G16JESD-609代码:e4
长度:9.9 mm逻辑集成电路类型:DECIMAL DECODER/DRIVER
功能数量:1端子数量:16
最高工作温度:75 °C最低工作温度:-20 °C
输出特性:OPEN-COLLECTOR输出极性:INVERTED
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE电源:5 V
传播延迟(tpd):50 ns认证状态:Not Qualified
座面最大高度:1.75 mm子类别:Decoder/Drivers
最大供电电压 (Vsup):5.25 V最小供电电压 (Vsup):4.75 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:TTL温度等级:COMMERCIAL EXTENDED
端子面层:NICKEL PALLADIUM GOLD端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
宽度:3.95 mmBase Number Matches:1

HD74LS145RPEL 数据手册

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Preliminary Datasheet  
R04DS0007EJ0400  
(Previous: REJ03D0436-0300)  
Rev.4.00  
HD74LS145  
BCD-to-Decimal Decoder / Driver (with 15 V outputs)  
Dec 24, 2010  
This BCD-to-decimal decoder / driver consists of eight inverters and ten four-input NAND gates. The inverters are  
connected in pairs to make BCD input data available for decoding by the NAND gates. Full decoding of valid BCD  
input logic ensures that all outputs remain off for all invalid binary input conditions. This decoder features high-  
performance, n-p-n output transistors designed for use as indicator / relay drivers or as open-collector logic-circuit  
drivers.  
Features  
Ordering Information  
Package Code  
(Previous Code)  
Package  
Abbreviation  
Taping Abbreviation  
(Quantity)  
Part Name  
Package Type  
PRDP0016AE-B  
(DP-16FV)  
HD74LS145P  
DILP-16 pin  
P
PRSP0016DH-B  
(FP-16DAV)  
HD74LS145FPEL  
HD74LS145RPEL  
SOP-16 pin (JEITA)  
SOP-16 pin (JEDEC)  
FP  
RP  
EL (2,000 pcs/reel)  
EL (2,500 pcs/reel)  
PRSP0016DG-A  
(FP-16DNV)  
Note: Please consult the sales office for the above package availability.  
Pin Arrangement  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
Y
Y
Y
Y
Y
Y
Y
0
1
2
3
4
5
6
VCC  
0
1
2
3
4
5
6
7
8
9
A
B
C
D
A
B
C
D
Inputs  
Outputs  
Y
Y
Y
9
8
7
Outputs  
GND  
(Top view)  
R04DS0007EJ0400 Rev.4.00  
Dec 24, 2010  
Page 1 of 6  

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