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HD74LS148P PDF预览

HD74LS148P

更新时间: 2024-11-08 05:35:15
品牌 Logo 应用领域
瑞萨 - RENESAS 运算电路逻辑集成电路光电二极管输出元件编码器
页数 文件大小 规格书
6页 72K
描述
8-line-to-3-line Octal Priority Encoder

HD74LS148P 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:DIP
包装说明:DIP, DIP16,.3针数:16
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.17其他特性:8 TO 3 LINE PRIORITY ENCODER; CASCADABLE; WITH GROUP SELECT OUTPUT
系列:LSJESD-30 代码:R-PDIP-T16
长度:19.2 mm逻辑集成电路类型:ENCODER
湿度敏感等级:1位数:8
功能数量:1端子数量:16
最高工作温度:75 °C最低工作温度:-20 °C
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP16,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V传播延迟(tpd):36 ns
认证状态:Not Qualified座面最大高度:5.06 mm
子类别:Arithmetic Circuits最大供电电压 (Vsup):5.25 V
最小供电电压 (Vsup):4.75 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:TTL
温度等级:COMMERCIAL EXTENDED端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.62 mm
Base Number Matches:1

HD74LS148P 数据手册

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HD74LS148  
8-line-to-3-line Octal Priority Encoder  
REJ03D0437–0200  
Rev.2.00  
Feb.18.2005  
The HD74LS148 encodes eight data lines to three-line (4-2-1) binary (octal). Cascading circuitry (enable input EI and  
enable output EO) has been provided to allow octal expansion without the need for external circuitry. The data inputs  
and outputs are active at the low logic level.  
Features  
Ordering Information  
Package Code  
(Previous Code)  
Package  
Abbreviation  
Taping Abbreviation  
(Quantity)  
Part Name  
Package Type  
DILP-16 pin  
PRDP0016AE-B  
(DP-16FV)  
HD74LS148P  
HD74LS148FPEL  
P
PRSP0016DH-B  
(FP-16DAV)  
SOP-16 pin (JEITA)  
FP  
EL (2,000 pcs/reel)  
Note: Please consult the sales office for the above package availability.  
Pin Arrangement  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
4
5
6
VCC  
4
5
6
7
EO  
GS  
3
EO  
GS  
3
Outputs  
Inputs  
7
EI  
2
2
EI  
Inputs  
A
A
2
1
0
A
2
1
1
Outputs  
1
A
0
A
0
GND  
A0  
Outputs  
(Top view)  
Rev.2.00, Feb.18.2005, page 1 of 5  

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