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HD74AC74FP-E PDF预览

HD74AC74FP-E

更新时间: 2024-11-13 13:08:15
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瑞萨 - RENESAS 触发器
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HD74AC74FP-E 数据手册

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HD74AC74  
Dual D-Type Positive Edge-Triggered Flip-Flop  
REJ03D0277–0200Z  
(Previous ADE-205-361 (Z))  
Rev.2.00  
Jul.16.2004  
Description  
The HD74AC74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs.  
Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a  
voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse. After the  
Clock Pulse input threshold voltage has been passed, the Data input is locked out and information present will not be  
transferred to the outputs until the next rising edge of the Clock Pulse input.  
Features  
Asynchronous Inputs:  
Low input to S (Set) sets Q to High level  
Low input to CDD (Clear) sets Q to Low level  
Clear and Set are independent of clock  
Simultaneous Low on CD and SD makes both Q and Q High  
Outputs Source/Sink 24 mA  
Ordering Information  
Part Name  
Package Type  
Package Code Package Abbreviation Taping Abbreviation (Quantity)  
HD74AC74P  
DIP-14 pin  
DP-14, -14AV  
FP-14DAV  
P
HD74AC74FPEL  
HD74AC74RPEL  
HD74AC74TELL  
SOP-14 pin (JEITA)  
FP  
RP  
T
EL (2,000 pcs/reel)  
EL (2,500 pcs/reel)  
ELL (2,000 pcs/reel)  
SOP-14 pin (JEDEC) FP-14DNV  
TSSOP-14 pin TTP-14DV  
Notes: 1. Please consult the sales office for the above package availability.  
2. The packages with lead-free pins are distinguished from the conventional products by adding V at the end of  
the package code.  
Pin Arrangement  
CD1  
D1  
1
2
3
4
5
6
14 VCC  
13 CD2  
12 D2  
CP1 D1  
SD1  
CD1  
CP1  
SD1  
Q1  
Q1 Q1  
11 CP2  
10 SD2  
D2  
CP2  
CD2 SD2  
Q2 Q2  
Q1  
9
8
Q2  
GND 7  
Q2  
(Top view)  
Rev.2.00, Jul.16.2004, page 1 of 7  

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