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HCTS540K

更新时间： 2024-11-02 22:55:03
品牌 Logo 应用领域
英特矽尔 - INTERSIL 驱动器
页数 文件大小 规格书
10页 138K
描述
Radiation Hardened Inverting Octal Buffer/Line Driver, Three-State

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HCTS540K 数据手册

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HCTS540MS  
Radiation Hardened  
Inverting Octal Buffer/Line Driver, Three-State  
September 1995  
Features  
Pinouts  
20 LEAD CERAMIC DUAL-IN-LINE  
METAL SEAL PACKAGE (SBDIP)  
MIL-STD-1835 CDIP2-T20, LEAD FINISH C  
TOP VIEW  
• 3 Micron Radiation Hardened CMOS SOS  
• Total Dose 200K RAD (Si)  
• SEP Effective LET No Upsets: >100 MEV-cm2/mg  
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/  
Bit-Day (Typ)  
1
2
3
4
5
6
7
8
9
VCC  
OE2  
OE1  
A0  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
20  
19  
18 Y0  
17 Y1  
16 Y2  
15 Y3  
14 Y4  
13 Y5  
• Dose Rate Survivability: >1 x 1012 RAD (Si)/s  
• Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse  
• Latch-Up Free Under Any Conditions  
• Fanout (Over Temperature Range)  
- Bus Driver Outputs 15 LSTTL Loads  
12  
Y6  
• Military Temperature Range: -55oC to +125oC  
• Significant Power Reduction Compared to LSTTL ICs  
• DC Operating Voltage Range: 4.5V to 5.5V  
GND 10  
11 Y7  
• LSTTL Input Compatibility  
- VIL = 0.8V Max  
20 LEAD CERAMIC METAL SEAL  
FLATPACK PACKAGE (FLATPACK)  
MIL-STD-1835 CDFP4-F20, LEAD FINISH C  
TOP VIEW  
- VIH = VCC/2 Min  
• Input Current Levels Ii ≤ 5µA at VOL, VOH  
OE1  
A0  
VCC  
OE2  
Y0  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
Description  
A1  
A2  
Y1  
The Intersil HCTS540MS is a Radiation Hardened inverting  
Octal Buffer/Line Driver, with two active-low output enables.  
The output enable pins (OE1 and OE2) control the three-  
state outputs. If either enable is high the outputs will be in  
the high impedance state. For data output both enables  
(OE1 and OE2) must be low.  
A3  
Y2  
A4  
Y3  
A5  
Y4  
A6  
Y5  
A7  
Y6  
Y7  
GND  
The HCTS540MS utilizes advanced CMOS/SOS technology  
to achieve high-speed operation. This device is a member of  
radiation hardened, high-speed, CMOS/SOS Logic Family.  
The HCTS540MS is supplied in a 20 lead Ceramic flatpack  
(K suffix) or a SBDIP Package (D suffix).  
Ordering Information  
PART NUMBER  
HCTS540DMSR  
TEMPERATURE RANGE  
SCREENING LEVEL  
PACKAGE  
20 Lead SBDIP  
o
o
-55 C to +125 C  
Intersil Class S Equivalent  
o
o
HCTS540KMSR  
-55 C to +125 C  
Intersil Class S Equivalent  
20 Lead Ceramic Flatpack  
20 Lead SBDIP  
o
HCTS540D/Sample  
HCTS540K/Sample  
HCTS540HMSR  
+25 C  
Sample  
Sample  
Die  
o
+25 C  
20 Lead Ceramic Flatpack  
Die  
o
+25 C  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
Spec Number 518631  
File Number 2232.2  
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999  
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HCTS541HMSR INTERSIL

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HCTS541K INTERSIL

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