Datasheet > HCPL-7710-560E

HCPL-7710-560E

更新时间： 2024-11-04 12:46:23

品牌	Logo	应用领域
安华高科 - AVAGO		光电输出元件
页数	文件大小	规格书
18页	305K
描述
40 ns Propagation Delay, CMOS Optocoupler

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

HCPL-7710-560E 数据手册

HCPL-7710/0710

40 ns Propagation Delay, CMOS Optocoupler

Data Sheet

Lead (Pb) Free

RoHS 6 fully

compliant

RoHS 6 fully compliant options available;

-xxxE denotes a lead-free product

Description

Features

Available in either an 8-pin DIP or SO-8 package style

respectively, the HCPL-7710 or HCPL-0710 optocouplers

utilizethelatestCMOSICtechnologytoachieveoutstand-

ing performance with very low power consumption. The

HCPL-x710requireonlytwobypasscapacitorsforcomplete

CMOS compatibility.

• +5 V CMOS compatibility

• 8 ns maximum pulse width distortion

• 20 ns maximum prop. delay skew

• High speed: 12 Mbd

• 40 ns maximum prop. delay

• 10 kV/µs minimum common mode rejection

• -40°C to 100°C temperature range

• Safety and regulatory approvals

UL Recognized

3750 V rms for 1 min. per UL 1577

5000 V rms for 1 min. per UL 1577 (for HCPL-7710

option 020)

Basic building blocks of the HCPL-x710 are a CMOS LED

driver IC, a high speed LED and a CMOS detector IC. A

CMOS logic input signal controls the LED driver IC which

supplies current to the LED. The detector IC incorporates

an integrated photodiode, a high-speed transimped-

ance ampliﬁer, and a voltage comparator with an output

driver.

CSA Component Acceptance Notice #5

IEC/EN/DIN EN 60747-5-2

Functional Diagram

– V_IORM= 630 Vpeak for HCPL-7710 Option 060

– V_IORM= 560 Vpeak for HCPL-0710 Option 060

**V

DD2

DD1

Applications

NC*

• Digital ﬁeldbus isolation: DeviceNet, SDS, Proﬁbus

• AC plasma display panel level shifting

• Multiplexed data transmission

• Computer peripheral interface

• Microprocessor system interface

NC*

LED1

GND

SHIELD

* Pin 3 is the anode of the internal LED and must be left

unconnected for guaranteed data sheet performance.

Pin 7 is not connected internally.

** A 0.1 µF bypass capacitor must be connected

between pins 1 and 4, and 5 and 8.

TRUTH TABLE

(POSITIVE LOGIC)

V , INPUT

LED1 V , OUTPUT

OFF

CAUTION: It is advised that normal static precautions be taken in handling and assembly

of this component to prevent damage and/or degradation which may be induced by ESD.

12 3 4 5 6 7...18

中文翻译

下载PDF

与HCPL-7710-560E相关器件

型号	品牌	获取价格	描述	数据表
HCPL-7710-XXXE	AGILENT	获取价格	40 ns Propagation Delay, CMOS Optocoupler
HCPL-7720	AVAGO	获取价格	40 ns Propagation Delay, CMOS Optocoupler High speed: 25 MBd
HCPL-7720	AGILENT	获取价格	40 ns Propagation Delay CMOS Optocoupler
HCPL-7720	BOARDCOM	获取价格	Optocoupler Option 020 for 5000 V rms/1 Minute Requirement
HCPL-7720#060	ETC	获取价格	FET-OUTPUT OPTOCOUPLER
HCPL-7720#300	ETC	获取价格	FET-OUTPUT OPTOCOUPLER
HCPL7720#360	ETC	获取价格	FET-OUTPUT OPTOCOUPLER
HCPL-7720#500	AGILENT	获取价格	1 CHANNEL LOGIC OUTPUT OPTOCOUPLER, 25 Mbps, 0.300 INCH, SURFACE MOUNT, DIP-8
HCPL-7720#500	AVAGO	获取价格	1 CHANNEL LOGIC OUTPUT OPTOCOUPLER, 25Mbps, 0.300 INCH, SURFACE MOUNT, DIP-8
HCPL7720#560	ETC	获取价格	FET-OUTPUT OPTOCOUPLER

与HCPL-7710-560E相关文章

英伟达新AI芯片Rubin或提前半年亮相
2024-11-05

13
苹果iPhone 17将全系采用三星/LG显示LTPO OLED面板
2024-11-05

7
三星深化印度制造布局，供应链本地化进程加速
2024-10-29

34
芯擎科技“星辰一号”自动驾驶芯片点亮成功，2025年量产在即
2024-10-29

30

产品中心

服务支持

精选活动

关于我们

帮助中心

HCPL-7710-560E

HCPL-7710-560E 数据手册

与HCPL-7710-560E相关器件

与HCPL-7710-560E相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

HCPL-7710-560E

HCPL-7710-560E 数据手册

与HCPL-7710-560E相关器件

与HCPL-7710-560E相关文章

您还可以找

您在本页遇到什么问题？