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HCPL-7710-XXXE PDF预览

HCPL-7710-XXXE

更新时间： 2024-11-03 21:54:51

品牌	Logo	应用领域
安捷伦 - AGILENT		光电
页数	文件大小	规格书
17页	433K
描述
40 ns Propagation Delay, CMOS Optocoupler

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数据手册

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HCPL-7710-XXXE 数据手册

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Agilent HCPL-7710, HCPL-0710

40 ns Propagation Delay,

CMOS Optocoupler

Data Sheet

Features

• +5 V CMOS compatibility

• 8 ns maximum pulse width

distortion

• 20 ns maximum prop. delay skew

• High speed: 12 Mbd

• 40 ns maximum prop. delay

Description

Basic building blocks of the

HCPL-x710 are a CMOS LED

driver IC, a high speed LED and a

CMOS detector IC. A CMOS logic

input signal controls the LED

driver IC which supplies current

to the LED. The detector IC

incorporates an integrated

photodiode, a high-speed

• 10 kV/ µs minimum common mode

rejection

Available in either an 8-pin DIP or

SO-8 package style respectively,

the HCPL-7710 or HCPL-0710

optocouplers utilize the latest

CMOS IC technology to achieve

outstanding performance with

very low power consumption. The

HCPL-x710 require only two

bypass capacitors for complete

CMOS compatibility.

• -40°C to 100°C temperature range

• Safety and regulatory approvals

UL Recognized

3750 V rms for 1 min. per

UL 1577

CSA Component Acceptance

Notice # 5

transimpedance amplifier, and a

voltage comparator with an

output driver.

IEC/ EN/ DIN EN 60747-5-2

– V_IORM= 630 Vpeak for

HCPL-7710 Option 060

Functional Diagram

– V_IORM= 560 Vpeak for

HCPL-0710 Option 060

TRUTH TABLE

(POSITIVE LOGIC)

**V

1

2

8

7

V

**

DD2

DD1

Applications

V , INPUT

I

LED1

V

, OUTPUT

O

H

L

OFF

ON

H

L

• Digital fieldbus isolation:

DeviceNet, SDS, Profibus

V

I

NC*

I

O

• AC plasma display panel level

shifting

3

4

6

5

*

V

O

LED1

• Multiplexed data transmission

• Computer peripheral interface

• Microprocessor system interface

GND

GND

2

1

SHIELD

* Pin 3 is the anode of the internal LED and must be left unconnected for guaranteed data sheet

performance. Pin 7 is not connected internally.

** A 0.1 µF bypass capacitor must be connected between pins 1 and 4, and 5 and 8.

CAUTION: It is advised that normal static precautions be taken in handling and assembly of this

component to prevent damage and/or degradation which may be induced by ESD.

12 3 4 5 6 7...17

中文翻译

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与HCPL-7710-XXXE相关器件

型号	品牌	获取价格	描述	数据表
HCPL-7720	AVAGO	获取价格	40 ns Propagation Delay, CMOS Optocoupler High speed: 25 MBd
HCPL-7720	AGILENT	获取价格	40 ns Propagation Delay CMOS Optocoupler
HCPL-7720	BOARDCOM	获取价格	Optocoupler Option 020 for 5000 V rms/1 Minute Requirement
HCPL-7720#060	ETC	获取价格	FET-OUTPUT OPTOCOUPLER
HCPL-7720#300	ETC	获取价格	FET-OUTPUT OPTOCOUPLER
HCPL7720#360	ETC	获取价格	FET-OUTPUT OPTOCOUPLER
HCPL-7720#500	AGILENT	获取价格	1 CHANNEL LOGIC OUTPUT OPTOCOUPLER, 25 Mbps, 0.300 INCH, SURFACE MOUNT, DIP-8
HCPL-7720#500	AVAGO	获取价格	1 CHANNEL LOGIC OUTPUT OPTOCOUPLER, 25Mbps, 0.300 INCH, SURFACE MOUNT, DIP-8
HCPL7720#560	ETC	获取价格	FET-OUTPUT OPTOCOUPLER
HCPL-7720-000E	AVAGO	获取价格	40 ns Propagation Delay, CMOS Optocoupler

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