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HCPL-7560-560E PDF预览

HCPL-7560-560E

更新时间: 2024-11-30 14:09:43
品牌 Logo 应用领域
安华高科 - AVAGO 光电二极管
页数 文件大小 规格书
18页 261K
描述
SPECIALTY ANALOG CIRCUIT, PDSO8, ROHS COMPLIANT, SMT-8

HCPL-7560-560E 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:SOIC
包装说明:SOP,针数:8
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8541.40.80.00Factory Lead Time:17 weeks
风险等级:5.03Is Samacsys:N
模拟集成电路 - 其他类型:ANALOG CIRCUITJESD-30 代码:R-PDSO-G8
JESD-609代码:e3长度:9.8 mm
湿度敏感等级:1功能数量:1
端子数量:8最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified座面最大高度:4.33 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:6.35 mmBase Number Matches:1

HCPL-7560-560E 数据手册

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HCPL-7560  
Optically Isolated Sigma-Delta (Σ-) Modulator  
Data Sheet  
Lead (Pb) Free  
RoHS 6 fully  
compliant  
RoHS 6 fully compliant options available;  
-xxxE denotes a lead-free product  
Description  
Features  
The HCPL-7560 Optically Isolated Modulator and HCPL-  
0872 Digital Interface IC or digital filter together form  
an isolated programmable two-chip analog-to-digital  
converter. The isolated modulator allows direct mea-  
surement of motor phase currents in power inverters.  
8-bit Linearity  
200 ns Conversion Time  
(Pre-Trigger Mode 2 with HCPL-0872)  
8-bit Effective Resolution with 5µs Signal Delay  
(14-bit with 102 µs) (with HCPL-0872)  
Fast 3 µs Over-Range Detection (with HCPL-0872)  
In operation, the HCPL-7560 Isolated Modulator (op-  
tocoupler with 3750 V  
dielectric withstand voltage  
RMS  
rating) converts a low-bandwidth analog input into a  
high-speed one-bit data stream by means of a Sigma-  
Delta (Σ-) over-sampling modulator. This modulation  
provides for high noise margins and excellent immunity  
against isolation-mode transients. The modulator data  
and on-chip sampling clock are encoded and transmit-  
ted across the isolation boundary where they are recov-  
ered and decoded into separate high-speed clock and  
data channels.  
200 mV Input Range with Single 5 V Supply  
5% Internal Reference Voltage Matching  
Offset Calibration (with HCPL-0872)  
-40°C to +85°C Operating Temperature Range  
15 kV/µs Isolation Transient Immunity  
Safety Approval: UL 1577, CSA and  
IEC/EN/DIN EN 60747-5-2  
Applications  
Motor Phase and Rail Current Sensing  
Data Acquisition Systems  
Industrial Process Control  
Inverter Current Sensing  
General Purpose Current Sensing and Monitoring  
1
2
8
7
6
5
SIGMA-  
DELTA  
MOD./  
ENCODE  
MCU  
or  
DSP  
HCPL-0872  
or  
Digital Filter  
Input  
Current  
DECODE  
3
4
HCPL-7560  
NOTE: A 0.1 μF bypass capacitor must be connected between pins VDD1 and GND1 and between pins VDD2 and GND2.  
CAUTION: It is advised that normal static precautions be taken in handling and assembly  
of this component to prevent damage and/or degradation, which may be induced by ESD.  

HCPL-7560-560E 替代型号

型号 品牌 替代类型 描述 数据表
HCPL-7560-500 AVAGO

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SPECIALTY ANALOG CIRCUIT, PDSO8, SMT-8

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