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HCPL-2601.W PDF预览

HCPL-2601.W

更新时间: 2024-11-03 23:55:03
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11页 216K
描述
LOGIC-GATE-OUTPUT OPTOCOUPLER

HCPL-2601.W 数据手册

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HIGH SPEED-10 MBit/s  
LOGIC GATE OPTOCOUPLERS  
SINGLE-CHANNEL  
6N137  
DUAL-CHANNEL  
HCPL-2630  
HCPL-2601  
HCPL-2611  
HCPL-2631  
DESCRIPTION  
The 6N137, HCPL-2601/2611 single-channel and HCPL-2630/2631 dual-channel  
optocouplers consist of a 850 nm AlGaAS LED, optically coupled to a very high  
speed integrated photodetector logic gate with a strobable output. This output  
features an open collector, thereby permitting wired OR outputs. The coupled  
parameters are guaranteed over the temperature range of -40°C to +85°C. A  
maximum input signal of 5 mA will provide a minimum output sink current of 13  
mA (fan out of 8).  
8
1
An internal noise shield provides superior common mode rejection of typically 10  
kV/µs. The HCPL- 2601 and HCPL- 2631 has a minimum CMR of 5 kV/µs.  
The HCPL-2611 has a minimum CMR of 10 kV/µs.  
8
8
1
FEATURES  
• Very high speed-10 MBit/s  
• Superior CMR-10 kV/µs  
1
• Double working voltage-480V  
• Fan-out of 8 over -40°C to +85°C  
• Logic gate output  
• Strobable output  
• Wired OR-open collector  
• U.L. recognized (File # E90700)  
VCC  
N/C  
+
1
8
VCC  
+
1
8
VF1  
_
VE  
2
3
7
6
5
V01  
2
3
7
6
5
VF  
_
_
VO  
V02  
VF2  
GND  
N/C  
4
GND  
+
4
APPLICATIONS  
• Ground loop elimination  
• LSTTL to TTL, LSTTL or 5-volt CMOS  
• Line receiver, data transmission  
• Data multiplexing  
6N137  
HCPL-2601  
HCPL-2611  
HCPL-2630  
HCPL-2631  
• Switching power supplies  
• Pulse transformer replacement  
• Computer-peripheral interface  
TRUTH TABLE  
(Positive Logic)  
Input  
Enable  
Output  
H
L
H
H
L
H
H
H
L
H
L
L
L
H
L
NC  
NC  
H
µF bypass capacitor must be connected between pins 8 and 5.  
(See note 1)  
A 0.1  
2001 Fairchild Semiconductor Corporation  
DS300202  
7/9/01  
1 OF 11  
www.fairchildsemi.com  

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