HC55120, HC55121, HC55130, HC55131, HC55140,
HC55141, HC55142, HC55143, HC55150, HC55151
Data Sheet
February 1999
File Number 4659
ADVANCE INFORMATION
Low Power Universal SLIC Family
Features
The UniSLIC14 is a family of Ultra Low Power SLICs. The
feature set and common pinouts of the UniSLIC14 family
positions it as a universal solution for: Plain Old Telephone
Service (POTS), PBX, Central Office, Loop Carrier, Fiber in
the Loop, ISDN-TA and NT1+, Pairgain and Wireless Local
• Ultra Low Active Power (OHT) < 60mW
• Low Standby Power < 25mW
• Single/Dual Battery Operation
• Automatic Silent Battery Switching
• Thermal Management/Shutdown
• Battery Tracking Saturation Guard
• Single 5V Supply
[ /Title
(HC55
120,
HC551 Loop.
21,
The UniSLIC14 family achieves it’s ultra low power operation
HC551 through: It’s automatic single and dual battery operation
• Zero Crossing Ring Control
- Zero Voltage On/Zero Current Off
• Tip/Ring Disconnect
• Pulse Metering Capability
• 4 Wire Loopback
• Programmable Constant Current Feed
• Programmable Resistive Feed
• Programmable Loop Detect Threshold
• Programmable On-Hook and Off-Hook Overheads
• Programmable Overhead for Pulse Metering
• Programmable Polarity Reversal Time
• Selectable Transmit Gain 0dB/-6dB
• 2 Wire Impedance Set by Single Network
• Loop and Ground Key Detectors
• On-Hook Transmission
• Common Pinout
• HC55121
- Polarity Reversal
• HC55130
- -63dB Longitudinal Balance
• HC55140
- Polarity Reversal
- Ground Start
- Line Voltage Measurement
- 2 Wire Loopback
(based on line length), low power standby state and battery
30,
HC551
31,
HC551
40,
HC551
41,
HC551
42,
tracking saturation guard to ensure the maximum loop
coverage on the lowest battery voltage. This architecture is
ideal for power critical applications such as ISDN NT1+,
Pairgain and Wireless local loop products.
The UniSLIC14 family has many user programmable
features. This family of SLICs delivers a low noise, low
component count solution for Central Office and Loop
Carrier universal voice grade designs. The product family
integrates advanced pulse metering, test and signaling
capabilities, and zero crossing ring control.
HC551
43,
HC551
50,
HC551
51)
/Sub-
ject
(Low
Power
Uni-
versal
SLIC
Fam-
ily)
The UniSLIC14 family is designed in the Intersil “Latch” free
Bonded Wafer process. This process dielectrically isolates
the active circuitry to eliminate any leakage paths as found in
our competition’s JI process. This makes the UniSLIC14
family compliant with “hot plug” requirements and operation
in harsh outdoor environments.
Block Diagram
RRLY
STATE
DECODER
AND
C1
RING AND TEST
RELAY DRIVERS
C2
C3
TRLY1
TRLY2
DETECTOR
C4
C5
LOGIC
ZERO CURRENT
CROSSING
DT
DR
LOOP CURRENT
DETECTOR
- -63dB Longitudinal Balance
• HC55142
- Polarity Reversal
- Ground Start
- Line Voltage Measurement
SHD
RING TRIP
DETECTOR
GKD/LOOP LENGTH
DETECTOR
GKD_LVM
CRT_REV_LVM
POLARITY
REVERSAL
/Autho
r ()
/Key-
words
(Inter-
sil
- 2.2V
- 2 Wire Loopback
• HC55150
- Polarity Reversal
- Line Voltage Measurement
Pulse Metering
ILIM
RSYNC_REV
ROH
CDC
RDC_RSG
RD
RMS
LINE FEED
CONTROL
TIP
2-WIRE
RING
GND
INTERFACE
- 2.2V
Pulse Metering
RMS
V
V
TX
RX
- 2 Wire Loopback
4-WIRE INTERFACE
VF SIGNAL PATH
Corpo-
ration,
PTG
V
Related Literature
• AN9832, User’s Guide for Development Board
BATTERY
SWITCH
AND
BH
ZT
C
H
V
BL
BIAS
NETWORK
PULSE METERING
SIGNAL PATH
V
CC
ZSPM
SPM
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
1