™
GENLINX GS9000B
Serial Digital Decoder
DATA SHEET
DEVICE DESCRIPTION
FEATURES
The GS9000B is a CMOS integrated circuit specifically
designed to deserialize SMPTE 259M serial digital signals
at data rates to 370 Mbps.
•
•
fully compatible with SMPTE 259M
decodes 8 and 10 bit serial digital signals for data
rates to 370 Mb/s
The device incorporates a descrambler, serial to parallel
convertor, sync processing unit, sync warning unit and
automatic standards select circuitry.
•
pin and function compatible with GS9000S and
GS9000
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•
250 mW power dissipation at 270 MHz clock rates
Differential pseudo-ECL inputs for both serial clock and
data are internally level shifted to CMOS levels. Digital
outputs such as parallel data, parallel clock, HSYNC, Sync
Warning and Standard Select are all TTL compatible.
incorporates an automatic standards selection
function with the GS9005A Receiver or GS9015A
Reclocker
•
•
operates from single +5 or -5 volt supply
The GS9000B is designed to directly interface with the
GS9005A Reclocking Receiver to form a complete
SMPTE-serial-in to CMOS level parallel-out deserializer.
The GS9000B may also be used with the GS9010A and the
GS9005A to form an adjustment-free receiving system
which automatically adapts to all serial digital data rates.
The GS9015A can replace the GS9005A in GS9000B
applications where cable equalization is not required.
enables an adjustment-free Deserializer system
when used with GS9010A and GS9005A or GS9015A
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28 pin PLCC packaging
APPLICATIONS
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•
4ƒSC, 4:2:2 and 360 Mb/s serial digital interfaces
The GS9000B is packaged in a 28 pin PLCC and operates
from a single 5 volt, ±5% power supply.
Automatic standards select controller for serial routing
and distribution applications using GS9005A Receiver
or GS9015A Reclocker
GS9000B
5
6
SERIAL DATA IN
SERIAL DATA IN
PARALLEL DATA
OUT (10 BITS)
30 - BIT
LEVEL
SHIFT
SP
DESCRAMBLER
SHIFT REG
7
8
SERIAL CLOCK IN
SERIAL CLOCK IN
SYNC DETECT
LEVEL
SHIFT
(3FF 000 000 HEX)
ICLK
Word
Boundary
PARALLEL
TIMING
GENERATOR
PARALLEL CLOCK
OUT
Sync
SYNC CORRECTION 14
ENABLE
SYNC CORRECTION
Sync Error
HSYNC OUTPUT
SYNC WARNING
(Schmitt Trigger
Comparator)
SYNC WARNING 15
CONTROL
SYNC WARNING
FLAG
AUTO STANDARD SELECT
SS0
SS1
11
2 BIT
COUNTER
STANDARDS SELECT
OSC
CONTROL
Hsync Reset
FUNCTIONAL BLOCK DIAGRAM
Revision Date: December 1999
Document No. 521- 79 - 01
GENNUM CORPORATION P.O. Box 489, Stn A, Burlington, Ontario, Canada L7R 3Y3 tel. (905) 632-2996 fax: (905) 632-5946
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Gennum Japan Corporation A-302 Miyamae Village, 2-10-42 Miyamae, Suginami-ku, Tokyo 168, Japan tel. (03) 3334-7700 fax (03) 3247-8839