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GS9000CCTJ

更新时间： 2024-02-22 10:36:06
品牌 Logo 应用领域
GENNUM 解码器
页数 文件大小 规格书
8页 110K
描述
Serial Digital Decoder

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GS9000CCTJ 技术参数

生命周期：Obsolete零件包装代码：QLCC
包装说明：,针数：28
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.84Is Samacsys：N
商用集成电路类型：CONSUMER CIRCUITJESD-30 代码：S-PQCC-J28
功能数量：1端子数量：28
最高工作温度：70 °C最低工作温度：
封装主体材料：PLASTIC/EPOXY封装形状：SQUARE
封装形式：CHIP CARRIER认证状态：Not Qualified
最大供电电压 (Vsup)：5.25 V最小供电电压 (Vsup)：4.75 V
表面贴装：YES技术：CMOS
温度等级：COMMERCIAL端子形式：J BEND
端子位置：QUADBase Number Matches：1

GS9000CCTJ 数据手册

 浏览型号GS9000CCTJ的Datasheet PDF文件第2页浏览型号GS9000CCTJ的Datasheet PDF文件第3页浏览型号GS9000CCTJ的Datasheet PDF文件第4页浏览型号GS9000CCTJ的Datasheet PDF文件第5页浏览型号GS9000CCTJ的Datasheet PDF文件第6页浏览型号GS9000CCTJ的Datasheet PDF文件第7页 
™
GENLINX GS9000C  
Serial Digital Decoder  
DATA SHEET  
DEVICE DESCRIPTION  
FEATURES  
The GS9000C is a CMOS integrated circuit specifically  
designed to deserialize SMPTE 259M serial digital signals  
at data rates to 370Mb/s.  
•
•
fully compatible with SMPTE 259M  
decodes 8 and 10 bit serial digital signals for data  
rates to 370Mb/s  
The device incorporates a descrambler, serial to parallel  
convertor, sync processing unit, sync warning unit and  
automatic standards select circuitry.  
•
pin and function compatible with GS9000S, GS9000  
and GS9000B  
•
•
325mW power dissipation at 270MHz clock rates  
Differential pseudo-ECL inputs for both serial clock and  
data are internally level shifted to CMOS levels. Digital  
outputs such as parallel data, parallel clock, HSYNC,  
Sync Warning and Standard Select are all TTL compatible.  
incorporates an automatic standards selection  
function with the GS9005A Receiver or GS9015A  
Reclocker  
The GS9000C is designed to directly interface with the  
GS9005A Reclocking Receiver to form a complete  
SMPTE-serial-in to CMOS level parallel-out deserializer.  
The GS9000C may also be used with the GS9010A and  
the GS9005A to form an adjustment-free receiving system  
which automatically adapts to all serial digital data rates.  
The GS9015A can replace the GS9005A in GS9000C  
applications where cable equalization is not required.  
•
•
operates from single +5 or -5 volt supply  
enables an adjustment-free Deserializer system  
when used with GS9010A and GS9005A or  
GS9015A  
•
28 pin PLCC packaging  
APPLICATIONS  
•
•
4ƒSC, 4:2:2 and 360Mb/s serial digital interfaces  
The GS9000C is packaged in a 28 pin PLCC and operates  
from a single 5 volt, ±5% power supply.  
Automatic standards select controller for serial routing  
and distribution applications using GS9005A Receiver or  
GS9015A Reclocker  
GS9000C  
5
6
SERIAL DATA IN  
SERIAL DATA IN  
PARALLEL DATA  
OUT (10 BITS)  
30 - BIT  
SHIFT REG  
LEVEL  
SHIFT  
SP  
DESCRAMBLER  
7
8
SERIAL CLOCK IN  
SERIAL CLOCK IN  
SYNC DETECT  
(3FF 000 000 HEX)  
LEVEL  
SHIFT  
SCLK  
Word  
Boundary  
PARALLEL  
TIMING  
GENERATOR  
PARALLEL CLOCK  
OUT  
Sync  
SYNC CORRECTION 14  
ENABLE  
SYNC CORRECTION  
Sync Error  
HSYNC OUTPUT  
SYNC WARNING  
(Schmitt Trigger  
Comparator)  
SYNC WARNING 15  
CONTROL  
SYNC WARNING  
FLAG  
AUTO STANDARD SELECT  
SS0  
SS1  
11  
2 BIT  
OSC  
STANDARDS SELECT  
COUNTER  
CONTROL  
Hsync Reset  
FUNCTIONAL BLOCK DIAGRAM  
Revision Date: February 2000  
Document No. 522 - 49 - 01  
GENNUM CORPORATION P.O. Box 489, Stn. A, Burlington, Ontario, Canada L7R 3Y3  
Tel. +1 (905) 632-2996 Fax. +1 (905) 632-5946 E-mail: info@gennum.com  
www.gennum.com  
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