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GS9002

更新时间： 2024-02-17 19:33:48
品牌 Logo 应用领域
GENNUM 编码器
页数 文件大小 规格书
11页 316K
描述
GENLINXTM GS9002 Serial Digital Encoder

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GS9002 技术参数

生命周期：Obsolete零件包装代码：LCC
包装说明：QCCJ, LDCC44,.7SQ针数：44
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.82商用集成电路类型：CONSUMER CIRCUIT
JESD-30 代码：S-PQCC-J44端子数量：44
最高工作温度：70 °C最低工作温度：
封装主体材料：PLASTIC/EPOXY封装代码：QCCJ
封装等效代码：LDCC44,.7SQ封装形状：SQUARE
封装形式：CHIP CARRIER电源：5 V
认证状态：Not Qualified子类别：Other Consumer ICs
最大压摆率：205 mA最大供电电压 (Vsup)：5.25 V
最小供电电压 (Vsup)：4.75 V表面贴装：YES
技术：BIPOLAR温度等级：COMMERCIAL
端子形式：J BEND端子节距：1.27 mm
端子位置：QUAD

GS9002 数据手册

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™
GENLINX GS9002  
Serial Digital Encoder  
DATASHEET  
FEATURES  
DEVICE DESCRIPTION  
• fully compatible with SMPTE-259M serial digital  
standard  
TheGS9002isamonolithicbipolarintegratedcircuitdesigned  
to serialize SMPTE 125M and SMPTE 244M bit parallel digital  
signals as well as other 8 or 10 bit parallel formats. This device  
performs the functions of sync detection, parallel to serial  
conversion, data scrambling (using the X + X +1 algorithm),  
10x parallel clock multiplication and conversion of NRZ to  
NRZI serial data. It supports any of four selectable serial data  
rates from 100 Mb/s to over 360 Mb/s. The data rates are set  
by resistors and are selected by an on-board 2:4 decoder  
having two TTL level input address lines.  
• supports up to four serial bit rates to 400 Mb/s  
9
4
• accepts 8 bit and 10 bit TTL and CMOS  
compatible parallel data inputs  
9
4
• X + X + 1 scrambler, NRZI converter and sync  
detector may be disabled for transparent data  
transmission  
• pseudo-ECL serial data and clock outputs  
• single +5 or -5 volt supply  
Otherfeaturessuchasasyncdetectoroutput, asyncdetector  
disable input, and a lock detect output are also provided. The  
9
4
• 713 mW typical power dissipation (including ECL  
pull-down loads).  
X + X + 1 scrambler and NRZ to NRZI converter may be  
bypassed to allow the output of the parallel to serial converter  
to be directly routed to the output drivers.  
• 44 pin PLCC packaging  
The GS9002 provides pseudo-ECL outputs for the serial data  
and serialclockaswellasasingle-endedpseudo-ECLoutput  
of the regenerated parallel clock.  
APPLICATIONS  
• 4ƒSC, 4:2:2 and 360 Mb/s serial digital interfaces for  
Video cameras, VTRs, Signal generators  
The GS9002 directly interfaces with cable drivers GS9007,  
GS9008 and GS9009. The device requires a single +5 volt or  
-5 volt supply and typically consumes 713 mW of power while  
driving 100 Ω loads. The 44 pin PLCC packaging assures a  
small footprint for the complete encoder function.  
ORDERING INFORMATION  
Part Number  
Package Type  
Temperature Range  
GS9002 - CPM  
44 Pin PLCC  
0° to 70°C  
SCRAMBLER/  
SERIALIZER  
SELECT  
26  
6
3
SYNC DETECT  
SYNC DETECT  
DISABLE  
2:1 MUX  
38  
SERIAL DATA  
7-16  
PARALLEL DATA  
IN (10 BITS)  
SYNC  
DETECT  
39  
SERIAL DATA  
INPUT  
LATCH  
P/S  
CONVERTER  
SCRAMBLER  
NRZ  
NRZI  
42  
43  
20  
29  
SERIAL CLOCK  
SERIAL CLOCK  
PLD  
SCLK  
LOCK  
DETECT  
LOCK DETECT  
PHASE  
17  
CHARGE  
PUMP  
PCLK IN  
REGULATOR CAP  
FREQUENCY  
DETECT  
VCO  
22  
19  
36  
35  
LOOP FILTER  
PCLK OUT  
DRS0  
DRS1  
DATA RATE  
SWITCH  
DIV BY 10  
34  
33  
32  
31  
GENERATOR  
RVC00  
RVC01  
RVC02  
RVC03  
GS9002  
Patent No.5,357,220  
FUNCTIONAL BLOCK DIAGRAM  
Document No. 520 - 27 - 08  
Revision Date: March 2001  
GENNUM CORPORATION P.O. Box 489, Stn A, Burlington, Ontario, Canada L7R 3Y3 tel. (905) 632-2996 fax: (905) 632-5946  
Gennum Japan Corporation C-101 Miyamae Village, 2-10-42 Miyamae, Suginami-ku, Tokyo 168-0081, Japan tel. (03) 3334-7700 fax (03) 3247-8839  
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