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GS9002ACPME3

更新时间： 2024-01-03 08:55:21
品牌 Logo 应用领域
GENNUM 消费电路商用集成电路编码器
页数 文件大小 规格书
11页 462K
描述
GENLINX-TM GS9002A Serial Digital Encoder

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中文翻译

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GS9002ACPME3 技术参数

是否Rohs认证： 符合生命周期：Obsolete
包装说明：QCCJ, LDCC44,.7SQReach Compliance Code：compliant
风险等级：5.7Is Samacsys：N
商用集成电路类型：CONSUMER CIRCUITJESD-30 代码：S-PQCC-J44
端子数量：44最高工作温度：70 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：QCCJ封装等效代码：LDCC44,.7SQ
封装形状：SQUARE封装形式：CHIP CARRIER
电源：5 V认证状态：Not Qualified
子类别：Other Consumer ICs最大压摆率：205 mA
表面贴装：YES技术：BIPOLAR
温度等级：COMMERCIAL端子形式：J BEND
端子节距：1.27 mm端子位置：QUAD
Base Number Matches：1

GS9002ACPME3 数据手册

 浏览型号GS9002ACPME3的Datasheet PDF文件第2页浏览型号GS9002ACPME3的Datasheet PDF文件第3页浏览型号GS9002ACPME3的Datasheet PDF文件第4页浏览型号GS9002ACPME3的Datasheet PDF文件第5页浏览型号GS9002ACPME3的Datasheet PDF文件第6页浏览型号GS9002ACPME3的Datasheet PDF文件第7页 
™
GENLINX GS9002A  
SerialDigitalEncoder  
DATA SHEET  
FEATURES  
DEVICEDESCRIPTION  
• fully compatible with SMPTE-259M serial digital  
standard  
The GS9002A is a monolithic bipolar integrated circuit  
designed to serialize SMPTE 125M and SMPTE 244M bit  
parallel digital signals as well as other 8 or 10 bit parallel  
formats. This device performs the functions of sync detection,  
• supports up to four serial bit rates to 400 Mb/s  
9
• accepts 8 bit and 10 bit TTL and CMOS  
compatible parallel data inputs  
parallel to serial conversion, data scrambling (using the X +  
4
X
+1 algorithm), 10x parallel clock multiplication and  
9
4
conversion of NRZ to NRZI serial data. It supports any of four  
selectable serial data rates from 100 Mb/s to over 360 Mb/s.  
The data rates are set by resistors and are selected by an  
on-board 2:4 decoder having two TTL level input address  
lines.  
• X + X + 1 scrambler, NRZI converter and sync  
detector may be disabled for transparent data  
transmission  
• pseudo-ECL serial data and clock outputs  
• single +5 or -5 volt supply  
Otherfeaturessuchasasyncdetectoroutput, asyncdetector  
disable input, and a lock detect output are also provided. The  
• 713 mW typical power dissipation (including ECL  
pull-down loads).  
9
4
X + X + 1 scrambler and NRZ to NRZI converter may be  
bypassed to allow the output of the parallel to serial converter  
to be directly routed to the output drivers.  
• 44 pin PLCC packaging  
• Pb-free and Green  
The GS9002A provides pseudo-ECL outputs for the serial  
data and serial clock as well as a single-ended pseudo-ECL  
output of the regenerated parallel clock.  
APPLICATIONS  
• 4ƒSC, 4:2:2 and 360 Mb/s serial digital interfaces for  
Video cameras, VTRs, Signal generators  
ORDERING INFORMATION  
TheGS9002Adirectlyinterfaceswithcabledrivers GS9007A,  
GS9008A and GS9009A. The device requires a single +5 volt  
or -5 volt supply and typically consumes 713 mW of power  
while driving 100 Ω loads. The 44 pin PLCC packaging  
assures a small footprint for the complete encoder function.  
GS9002ACPM  
44 Pin PLCC o°C to 70°C  
No  
GS9002ACPME3 44 Pin PLCC o°C to 70°C  
Yes  
SCRAMBLER/  
SERIALIZER  
26  
SELECT  
3
SYNC DETECT  
6
SYNC DETECT  
2:1 MUX  
38  
DISABLE  
SERIAL DATA  
7-16  
PARALLEL DATA  
IN (10 BITS)  
SYNC  
DETECT  
39  
SERIAL DATA  
INPUT  
LATCH  
P/S  
CONVERTER  
SCRAMBLER  
NRZ  
NRZI  
42  
43  
20  
29  
SERIAL CLOCK  
SERIAL CLOCK  
PLD  
SCLK  
LOCK  
DETECT  
LOCK DETECT  
PHASE  
17  
CHARGE  
PUMP  
PCLK IN  
REGULATOR CAP  
FREQUENCY  
DETECT  
VCO  
22  
19  
36  
35  
LOOP FILTER  
PCLK OUT  
DRS0  
DRS1  
DATA RATE  
SWITCH  
DIV BY 10  
34  
33  
32  
31  
GENERATOR  
RVC00  
RVC01  
RVC02  
RVC03  
GS9002A  
Patent No.5,357,220  
FUNCTIONALBLOCKDIAGRAM  
Document No. 24149 - 1  
Revision Date: June 2004  
GENNUM CORPORATION P.O. Box 489, Stn A, Burlington, Ontario, Canada L7R 3Y3 tel. (905) 632-2996 fax: (905) 632-5946  
Gennum Japan: Shinjuku Green Tower Building 27F 6-14-1, Nishi Shinjuku Shinjuku-ku, Tokyo 160-0023 Japan  
Tel: +81 (03) 3349-5501  
Fax: +81 (03) 3349-5505  
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