5秒后页面跳转
捷配首页

Datasheet > GS8161Z36D-250
GS8161Z36D-250 PDF预览

GS8161Z36D-250

更新时间： 2024-11-19 07:02:07
品牌 Logo 应用领域
GSI 静态存储器
页数 文件大小 规格书
36页 901K
描述
18Mb Pipelined and Flow Through Synchronous NBT SRAM

阅读下载

中文翻译

获取价格

GS8161Z36D-250 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：BGA包装说明：BGA, BGA165,11X15,40
针数：165Reach Compliance Code：compliant
ECCN代码：3A991.B.2.BHTS代码：8542.32.00.41
风险等级：5.68最长访问时间：5.5 ns
其他特性：FLOW-THROUGH OR PIPELINED ARCHITECTURE; ALSO OPERATES AT 3.3V SUPPLY最大时钟频率 (fCLK)：250 MHz
I/O 类型：COMMONJESD-30 代码：R-PBGA-B165
JESD-609代码：e0长度：15 mm
内存密度：18874368 bit内存集成电路类型：ZBT SRAM
内存宽度：36湿度敏感等级：3
功能数量：1端子数量：165
字数：524288 words字数代码：512000
工作模式：SYNCHRONOUS最高工作温度：70 °C
最低工作温度：组织：512KX36
输出特性：3-STATE封装主体材料：PLASTIC/EPOXY
封装代码：BGA封装等效代码：BGA165,11X15,40
封装形状：RECTANGULAR封装形式：GRID ARRAY
并行/串行：PARALLEL峰值回流温度（摄氏度）：NOT SPECIFIED
电源：2.5/3.3 V认证状态：Not Qualified
最大待机电流：0.02 A最小待机电流：2.3 V
子类别：SRAMs最大压摆率：0.29 mA
最大供电电压 (Vsup)：2.7 V最小供电电压 (Vsup)：2.3 V
标称供电电压 (Vsup)：2.5 V表面贴装：YES
技术：CMOS温度等级：COMMERCIAL
端子面层：TIN LEAD端子形式：BALL
端子节距：1 mm端子位置：BOTTOM
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：13 mm
Base Number Matches：1

GS8161Z36D-250 数据手册

 浏览型号GS8161Z36D-250的Datasheet PDF文件第2页浏览型号GS8161Z36D-250的Datasheet PDF文件第3页浏览型号GS8161Z36D-250的Datasheet PDF文件第4页浏览型号GS8161Z36D-250的Datasheet PDF文件第5页浏览型号GS8161Z36D-250的Datasheet PDF文件第6页浏览型号GS8161Z36D-250的Datasheet PDF文件第7页 
GS8161Z18(T/D)/GS8161Z32(D)/GS8161Z36(T/D)  
100-Pin TQFP  
Commercial Temp  
Industrial Temp  
250 MHz–133 MHz  
18Mb Pipelined and Flow Through  
Synchronous NBT SRAM  
2.5 V or 3.3 V V  
DD  
2.5 V or 3.3 V I/O  
Because it is a synchronous device, address, data inputs, and  
read/ write control inputs are captured on the rising edge of the  
input clock. Burst order control (LBO) must be tied to a power  
rail for proper operation. Asynchronous inputs include the  
Sleep mode enable, ZZ and Output Enable. Output Enable can  
be used to override the synchronous control of the output  
drivers and turn the RAM's output drivers off at any time.  
Write cycles are internally self-timed and initiated by the rising  
edge of the clock input. This feature eliminates complex off-  
chip write pulse generation required by asynchronous SRAMs  
and simplifies input signal timing.  
Features  
• User-configurable Pipeline and Flow Through mode  
• NBT (No Bus Turn Around) functionality allows zero wait  
read-write-read bus utilization  
• Fully pin-compatible with both pipelined and flow through  
NtRAM™, NoBL™ and ZBT™ SRAMs  
• IEEE 1149.1 JTAG-compatible Boundary Scan  
• 2.5 V or 3.3 V +10%/–10% core power supply  
• LBO pin for Linear or Interleave Burst mode  
• Pin-compatible with 2M, 4M, and 8M devices  
• Byte write operation (9-bit Bytes)  
• 3 chip enable signals for easy depth expansion  
• ZZ pin for automatic power-down  
• JEDEC-standard 100-lead TQFP and 165-bump FP-BGA  
packages  
The GS8161Z18(T/D)/GS8161Z32(D)/GS8161Z36(T/D) may  
be configured by the user to operate in Pipeline or Flow  
Through mode. Operating as a pipelined synchronous device,  
in addition to the rising-edge-triggered registers that capture  
input signals, the device incorporates a rising-edge-triggered  
output register. For read cycles, pipelined SRAM output data is  
temporarily stored by the edge triggered output register during  
the access cycle and then released to the output drivers at the  
next rising edge of clock.  
Functional Description  
The GS8161Z18(T/D)/GS8161Z32(D)/GS8161Z36(T/D) is an  
18Mbit Synchronous Static SRAM. GSI's NBT SRAMs, like  
ZBT, NtRAM, NoBL or other pipelined read/double late write  
or flow through read/single late write SRAMs, allow  
utilization of all available bus bandwidth by eliminating the  
need to insert deselect cycles when the device is switched from  
read to write cycles.  
The GS8161Z18(T/D)/GS8161Z32(D)/GS8161Z36(T/D) is  
implemented with GSI's high performance CMOS technology  
and is available in JEDEC-standard 100-pin TQFP and  
165-bump FP-BGA packages.  
Parameter Synopsis  
-250 -225 -200 -166 -150 -133 Unit  
Pipeline  
3-1-1-1  
t
2.5 2.7 3.0 3.4 3.8 4.0 ns  
4.0 4.4 5.0 6.0 6.7 7.5 ns  
KQ  
tCycle  
Curr (x18)  
280 255 230 200 185 165 mA  
3.3 V  
2.5 V  
Curr (x32/x36) 330 300 270 230 215 190 mA  
Curr (x18) 275 250 230 195 180 165 mA  
Curr (x32/x36) 320 295 265 225 210 185 mA  
Flow  
Through  
2-1-1-1  
t
5.5 6.0 6.5 7.0 7.5 8.5 ns  
5.5 6.0 6.5 7.0 7.5 8.5 ns  
KQ  
tCycle  
Curr (x18)  
175 165 160 150 145 135 mA  
3.3 V  
2.5 V  
Curr (x32/x36) 200 190 180 170 165 150 mA  
Curr (x18) 175 165 160 150 145 135 mA  
Curr (x32/x36) 200 190 180 170 165 150 mA  
Rev: 2.15 11/2004  
1/36  
© 1998, GSI Technology  
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.  
1234567...36

中文翻译

下载PDF

与GS8161Z36D-250相关器件

型号 品牌 获取价格 描述 数据表
GS8161Z36D-250I GSI

获取价格

 		18Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8161Z36D-250IT GSI

获取价格

 		18Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8161Z36D-250T GSI

获取价格

 		18Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8161Z36DD-150 GSI

获取价格

 		165 BGA
GS8161Z36DD-150I GSI

获取价格

 		165 BGA
GS8161Z36DD-150IV GSI

获取价格

 		ZBT SRAM, 512KX36, 7.5ns, CMOS, PBGA165, FPBGA-165
GS8161Z36DD-150V GSI

获取价格

 		165 BGA
GS8161Z36DD-200 GSI

获取价格

 		165 BGA
GS8161Z36DD-200I GSI

获取价格

 		165 BGA
GS8161Z36DD-200IV GSI

获取价格

 		165 BGA

与GS8161Z36D-250相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证