Datasheet > GM76U8128CLG-10

GM76U8128CLG-10

更新时间： 2024-11-06 23:53:55

品牌	Logo	应用领域
其他 - ETC		静态存储器
页数	文件大小	规格书
11页	104K
描述
x8 SRAM

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中文翻译

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数据手册

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GM76U8128CLG-10 数据手册

GM76U8128CL/CLL

LG Semicon Co.,Ltd.

131,072 WORDS x 8 BIT

CMOS STATIC RAM

Description

Pin Configuration

The GM76U8128CL/CLL is a 1,048,576 bits static

random access memory organized as 131,072 words

by 8 bits. Using a 0.6um advanced CMOS technology

and it provides high speed operation with minimum

cycle time of 85/100ns. The device is placed in a low

power standby mode with /CS1 high or CS2 low and

the output enable (/OE) allows fast memory access.

Thus it is suitable for high speed and low power

applications, especially where battery back-up is

required.

A16

A14

32 VCC

A15

30 CS2

29 /WE

A12

A13

27 A8

26 A9

25 A11

Features

/OE

* Fast Speed : 85/100ns

A10

* Low Power Standby and Low Power Operation

Standby : 66uW Max. at TA = - 40 ~ 85C(LLE/LLI)

99uW Max. at TA = - 40 ~ 85C(LE/LI)

49.5uW Max. at TA = 0 ~ 70C(LL)

165uW Max. at TA = 0 ~ 70C(L)

Operation : 132mW (Max)

/CS1

I/O7

I/O0 13

I/O1 14

20 I/O6

19 I/O5

I/O2

I/O4

* Completely Static RAM : No Clock or Timing

Strobe Required

VSS

I/O3

* Equal Access and Cycle Time

* TTL compatible inputs and outputs

* Capability of Battery Back-up Operation

* Single + 3.0V+/-0.3V Operation

* Standard 32DIP, SOP and TSOP-I,STSOP-I

* Temperature Range

(Top View)

Block Diagram

Commercial(0¡ •70C) : GM76U8128C

Extended (-25 ~ 85C) : GM76U8128C-E

Industrial (-40 ~ 85C) : GM76U8128C-I

MEMORY CELL ARRAY

1024 x 128 x 8

1024

Decoder

(128K x 8)

Address

Buffer

Pin Description

A0-A16

/WE

Function

Address Inputs

A14

A15

A16

128 x 8

128

Column Select

Decorder

Write Enable Input

Chip Select Input

Output Enable Input

Data Inputs/Outputs

Power Supply (2.7V ~3.3V)

Ground

/CS1, CS2

/OE

/CS1, CS2

/CS1

CS2

Chip

Control

I/O0-I/O7

VCC

/OE, /WE

/OE

I/O Buffer

Chip

Control

/WE

VSS

No Connection

109

12 3 4 5 6 7...11

中文翻译

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