DDR3L SDRAM
GDP2BFLM GDP2A8LM
7.3.1 Differential Signals Definition ..................................................................................................................22
7.3.2 Differential Swing Requirements for Clock (CK - CK#) and strobe (DQS - DQS#) ................................22
7.3.3 Single-ended Requirements for Differential Signals ...............................................................................24
7.4 Differential Input Cross Point Voltage ................................................................................................... 25
7.5 Slew Rate Definitions for Single-ended Input Signals........................................................................... 26
7.6 Slew Rate Definitions for Differential Input Signals............................................................................... 26
8 AC&DC OUTPUT MEASUREMENT LEVELS.....................................................................27
8.1 Single-ended AC and DC Output Levels............................................................................................... 27
8.2 Differential AC and DC Output Levels................................................................................................... 27
8.3 Single-ended Output Slew Rate............................................................................................................ 27
8.4 Differential Output Slew Rate ................................................................................................................ 29
8.5 Reference Load for AC Timing and Output Slew Rate ......................................................................... 30
8.6 Overshoot and Undershoot Specifications............................................................................................ 30
8.6.1 Address and Control Overshoot and Undershoot Specifications............................................................30
8.6.2 Clock, Data, Strobe and Mask Overshoot and Undershoot Specifications.............................................31
8.7 34Ω Output Driver DC Electronic Characteristics ................................................................................. 32
8.7.1 Output Driver Temperature and Voltage Sensitivity ................................................................................33
8.8 On-Die Termination (ODT) Levels and I-V Characteristics................................................................... 34
8.8.1 ODT DC Electrical Characteristic............................................................................................................34
8.8.2 ODT DC Temperature and Voltage Sensitivity........................................................................................36
8.9 ODT Timing Definitions.......................................................................................................................... 37
8.9.1 Test Load for ODT Timings .....................................................................................................................37
8.9.2 ODT Timing Definitions ...........................................................................................................................37
9 IDD CURRENT MEASURE METHOD ...................................................................................40
9.1 IDD Measurement Conditions ................................................................................................................. 40
9.2 IDD Specifications.................................................................................................................................... 53
10 INPUT/OUTPUT CAPACITANCE.........................................................................................55
10.1 Input/Output Capacitance................................................................................................................... 55
DS-00823-GDP2BFLM-Rev1.1
3
2023/6/28
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