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FX929AP4 PDF预览

FX929AP4

更新时间: 2024-11-03 23:14:07
品牌 Logo 应用领域
CMLMICRO 调制解调器
页数 文件大小 规格书
44页 1595K
描述
4-Level FSK Modem Data Pump

FX929AP4 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:DIP, DIP24,.6Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.82
JESD-30 代码:R-PDIP-T24JESD-609代码:e0
长度:31.37 mm功能数量:1
端子数量:24最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP24,.6
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3/5 V
认证状态:Not Qualified座面最大高度:5.59 mm
子类别:Modems最大压摆率:0.03 mA
表面贴装:NO技术:CMOS
电信集成电路类型:MODEM-SUPPORT CIRCUIT温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:15.24 mm
Base Number Matches:1

FX929AP4 数据手册

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CML Semiconductor Products  
4-Level FSK Modem Data Pump FX929A  
D/929A/4 June 1996  
1.0  
Features  
Advance Information  
· 4-Level FSK Modulation  
· Half Duplex, 4800 to 19.2k bits/sec  
· Full Packet Data Framing  
· RD-LAP Compatible*  
· Flexible Operating Modes  
· Host Bus Interface  
· Low Power 3.3V to 5V Operation  
· 24-Pin Small Form Package Option  
· Radio Data-Link Access Procedure (RD-LAP) is a data communications air interface protocol developed by Motorola Inc. ·  
1.1  
Brief Description  
The FX929A is a CMOS integrated circuit that contains all of the baseband signal processing and Medium  
Access Control (MAC) protocol functions required for a high performance 4-level FSK Wireless Packet Data  
Modem. It interfaces with the modem host processor and the radio modulation/demodulation circuits to deliver  
reliable two-way transfer of the application data over the wireless link.  
The FX929A assembles application data received from the processor, adds forward error correction (FEC) and  
error detection (CRC) information and interleaves the result for burst-error protection. After adding symbol and  
frame sync codewords, it converts the packet into filtered 4-level analogue signals for modulating the radio  
transmitter.  
In receive mode, the FX929A performs the reverse function using the analogue signals from the receiver  
discriminator. After error correction and removal of the packet overhead, the recovered application data is  
supplied to the processor. Any residual uncorrected errors in the data will be flagged. A readout of the SNR  
value during receipt of a packet is also provided.  
The FX929A uses data block sizes and FEC/CRC algorithms compatible with the RD-LAP over-air standard.  
The format used is suitable for other private applications which require the high-speed transfer of data over  
narrow-band wireless links. The device is programmable to operate at most standard bit-rates from a wide  
choice of Xtal/clock frequencies.  
ã 1996 Consumer Microcircuits Limited  

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