Datasheet > FQV4070L10PFI

FQV4070L10PFI

更新时间： 2024-01-09 12:31:03

品牌	Logo	应用领域
联笙电子 - AMICC		时钟先进先出芯片内存集成电路
页数	文件大小	规格书
42页	459K
描述
FIFO, 8KX40, 6.5ns, Synchronous, CMOS, PQFP144

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FQV4070L10PFI 技术参数

是否Rohs认证：	不符合	生命周期：	Contact Manufacturer
包装说明：	QFP, QFP144,.87SQ,20	Reach Compliance Code：	unknown
ECCN代码：	EAR99	HTS代码：	8542.32.00.71
风险等级：	5.89	最长访问时间：	6.5 ns
最大时钟频率 (fCLK)：	100 MHz	JESD-30 代码：	S-PQFP-G144
内存密度：	327680 bit	内存集成电路类型：	OTHER FIFO
内存宽度：	40	端子数量：	144
字数：	8192 words	字数代码：	8000
工作模式：	SYNCHRONOUS	最高工作温度：	85 °C
最低工作温度：	-40 °C	组织：	8KX40
封装主体材料：	PLASTIC/EPOXY	封装代码：	QFP
封装等效代码：	QFP144,.87SQ,20	封装形状：	SQUARE
封装形式：	FLATPACK	电源：	3.3 V
认证状态：	Not Qualified	最大待机电流：	0.015 A
子类别：	FIFOs	最大压摆率：	0.04 mA
标称供电电压 (Vsup)：	3.3 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子形式：	GULL WING	端子节距：	0.5 mm
端子位置：	QUAD	Base Number Matches：	1

FQV4070L10PFI 数据手册

FQV40110 · FQV40100 · FQV4090 · FQV4080 · FQV4080 · FQV4070 · FQV4060 · FQV4050 · FQV4040

FlexQ

^TMIII Plus

3.3 Volt Synchronous x40 First-In/First-Out Queue

Memory Organization

131,072 x 40

Device

FQV40110

FQV40100

FQV4090

FQV4080

Memory Organization

8,192 x 40

Device

FQV4070

FQV4060

FQV4050

FQV4040

65,536 x 40

32,768 x 40

16,384 x 40

4,096 x 40

2,048 x 40

1,024 x 40

Key Features

•

Industry leading First-In/First-Out Queues (up to 166MHz)

Write cycle time of 6.0ns independent of Read cycle time (Data Setup time = 2.0ns)

Read cycle time of 6.0ns independent of Write cycle time (Data Access time = 4.0ns)

User selectable input and output port bus-sizing

Big Endian/Little Endian user selectable byte representation

3.3V power supply

5V input tolerant on all control and data input pins

5V output tolerant on all flags and data output pins

Master Reset clears all previously programmed configurations including Write and Read pointers

Partial Reset clears Write and Read pointers but maintains all previously programmed configurations

First Word Fall Through (FWFT) and Standard Timing modes

Presets for eight different Almost Full and Almost Empty offset values

Parallel/Serial programming of PRAF and PRAE offset values

Programmable 8-bit or 10-bit parallel programming modes for offset values

Full, Empty, Almost Full, Almost Empty, and Half Full indicators

PRAF and PRAE operates in either synchronous or asynchronous modes

Asynchronous output enable tri-state data output drivers

Data retransmission with programmable zero or normal latency modes

Available package: 144 - pin Plastic Thin Quad Flat Pack (TQFP)

(0°C to 70°C) Commercial operating temperature available for cycle time of 6.0ns and above

(-40°C to 85°C) Industrial operating temperature available for cycle time of 7.5ns and above

Product Description

HBA’s FlexQ™ III Plus offers industry leading FIFO queuing bandwidth (up to 6.0 Gbps), with a wide range of memory

configurations (from 1,024 x 40 to 131,072 x 40). System designer has full flexibility of implementing deeper and wider queues

using FWFT mode and width expansion features. Full, Empty, and Half-Full indicators allow easy handshaking between

transmitters and receivers. User programmable Almost Full and Almost Empty (Parallel/Serial) indicators allow implementation

of virtual queue depths.

5V tolerant on all input and output pins allow easy interfacing with devices operating at higher voltage levels. Asynchronous

Output Enable pin configures the tri-state data output drivers. Independent Write and Read controls provide rate-matching

capability.

Master Reset clears all previously programmed configurations by providing a low pulse on MRST pin. In addition, Write and

Read pointers to the queue are initialized to zero. Partial Reset will not alter previously programmed configurations but will

initialize Write and Read pointers to zero.

In FWFT mode, first data written into the queue appears on output data bus after the specified latency period at the low to high

transition of RCLK. Subsequent reads from the queue will require asserting REN . This feature is useful when implementing

depth expansion functions. In this mode, DRDY and QRDY are used instead of FULL and EMPTY respectively.

In Standard mode, always assert REN for read operation. FULL and EMPTY are used instead of DRDY and

QRDY respectively.

JULY 2002

3F3P40B

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与FQV4070L10PFI相关器件

型号	品牌	描述	获取价格	数据表
FQV80100L10BB	AMICC	FIFO, 64KX80, 6.5ns, Synchronous, CMOS, PBGA256	获取价格
FQV80100L10BBI	AMICC	FIFO, 64KX80, 6.5ns, Synchronous, CMOS, PBGA256	获取价格
FQV80100L6BB	AMICC	FIFO, 64KX80, 4ns, Synchronous, CMOS, PBGA256	获取价格
FQV80100L7.5BB	AMICC	FIFO, 64KX80, 5ns, Synchronous, CMOS, PBGA256	获取价格
FQV80100L7.5BBI	AMICC	FIFO, 64KX80, 6.5ns, Synchronous, CMOS, PBGA256	获取价格
FQV8070L10BB	AMICC	FIFO, 8KX80, 6.5ns, Synchronous, CMOS, PBGA256	获取价格

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