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FCT162501CTPVCTG4 PDF预览

FCT162501CTPVCTG4

更新时间: 2024-10-27 14:50:11
品牌 Logo 应用领域
德州仪器 - TI 光电二极管输出元件逻辑集成电路触发器
页数 文件大小 规格书
14页 293K
描述
FCT SERIES, 18-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56, 0.300 INCH, GREEN, PLASTIC, SSOP-56

FCT162501CTPVCTG4 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Obsolete零件包装代码:SSOP
包装说明:SSOP, SSOP56,.4针数:56
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.32Is Samacsys:N
控制类型:INDEPENDENT CONTROL计数方向:BIDIRECTIONAL
系列:FCTJESD-30 代码:R-PDSO-G56
JESD-609代码:e4长度:18.415 mm
逻辑集成电路类型:REGISTERED BUS TRANSCEIVER最大I(ol):0.024 A
湿度敏感等级:1位数:18
功能数量:1端口数量:2
端子数量:56最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE WITH SERIES RESISTOR
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SSOP56,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:5 VProp。Delay @ Nom-Sup:4.6 ns
传播延迟(tpd):5.3 ns认证状态:Not Qualified
座面最大高度:2.79 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.635 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED翻译:N/A
触发器类型:POSITIVE EDGE宽度:7.49 mm
Base Number Matches:1

FCT162501CTPVCTG4 数据手册

 浏览型号FCT162501CTPVCTG4的Datasheet PDF文件第2页浏览型号FCT162501CTPVCTG4的Datasheet PDF文件第3页浏览型号FCT162501CTPVCTG4的Datasheet PDF文件第4页浏览型号FCT162501CTPVCTG4的Datasheet PDF文件第5页浏览型号FCT162501CTPVCTG4的Datasheet PDF文件第6页浏览型号FCT162501CTPVCTG4的Datasheet PDF文件第7页 
1CY74FCT162H501  
T
Data sheet acquired from Cypress Semiconductor Corporation.  
Data sheet modified to remove devices not offered.  
CY74FCT16501T  
CY74FCT162501T  
CY74FCT162H501T  
SCCS057B - August 1994 - Revised September 2001  
18-Bit Registered Transceivers  
Features  
Functional Description  
• Ioff supports partial-power-down mode operation  
• Edge-rate control circuitry for significantly improved  
noise characteristics  
• Typical output skew < 250 ps  
• ESD > 2000V  
• TSSOP (19.6 mil pitch) and SSOP (25-mil pitch)  
packages  
These 18-bit universal bus transceivers can be operated in  
transparent, latched or clock modes by combining D-type  
latches and D-type flip-flops. Data flow in each direction is  
controlled by output enable (OEAB and OEBA), latch enable  
(LEAB and LEBA), and clock inputs (CLKAB and CLKBA). For  
A-to-B data flow, the device operates in transparent mode  
when LEAB is HIGH. When LEAB is LOW, the A data is latched  
if CLKAB is held at a HIGH or LOW logic level. If LEAB is LOW,  
the A bus data is stored in the latch/flip-flop on the  
LOW-to-HIGH transition of CLKAB. OEAB performs the output  
enable function on the B port. Data flow from B-to-A is similar  
to that of A-to-B and is controlled by OEBA, LEBA, and CLKBA.  
• Industrial temperature range of 40˚C to +85˚C  
• VCC = 5V ± 10%  
CY74FCT16501T Features:  
• 64 mA sink current, 32 mA source current  
• Typical VOLP (ground bounce) <1.0V at VCC = 5V,  
TA = 25˚C  
This device is fully specified for partial-power-down  
applications using Ioff. The Ioff circuitry disables the outputs,  
preventing damaging current backflow through the device  
when it is powered down.  
CY74FCT162501T Features:  
The CY74FCT16501T is ideally suited for driving  
high-capacitance loads and low-impedance backplanes.  
• Balanced 24 mA output drivers  
• Reduced system switching noise  
THE CY74FCT162501T has 24-mA balanced output drivers  
with current limiting resistors in the outputs. This reduces the  
need for external terminating resistors and provides for minimal  
• Typical VOLP (ground bounce) <0.6V at VCC = 5V,  
TA= 25˚C  
CY74FCT162H501T Features:  
undershoot  
and  
reduced  
ground  
bounce.  
The  
CY74FCT162501T is ideal for driving transmission lines.  
• Bus hold retains last active state  
• Eliminates the need for external pull-up or pull-down  
resistors  
The CY74FCT162H501T is a 24-mA balanced output part, that  
has “bus hold” on the data inputs. The device retains the input’s  
last state whenever the input goes to high impedance. This  
eliminates the need for pull-up/down resistors and prevents  
floating inputs.  
Pin Configuration  
SSOP/TSSOP  
Functional Block Diagram  
Top View  
OEAB  
LEAB  
1
2
56  
55  
GND  
CLKAB  
A
1
B
1
GND  
3
4
54  
53  
GND  
A
2
B
2
5
6
7
8
9
52  
51  
50  
49  
48  
OEAB  
CLKBA  
LEBA  
A
B
3
3
V
CC  
V
CC  
A
4
B
4
A
A
B
5
5
6
B
6
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
OEBA  
CLKAB  
LEAB  
GND  
GND  
A
7
B
7
A
A
B
8
8
9
B
9
A
A
A
B
10  
10  
C
D
C
D
B
11  
B
1
11  
12  
A
1
B
12  
GND  
GND  
B
13  
A
13  
C
D
C
D
A
B
14  
14  
A
B
15  
15  
V
CC  
V
CC  
A
A
B
16  
16  
17  
B
17  
GND  
GND  
B
18  
FCT16501-1  
TO 17 OTHER CHANNELS  
A
18  
CLKBA  
GND  
OEBA  
LEBA  
FCT16501-2  
Copyright © 2001, Texas Instruments Incorporated  

FCT162501CTPVCTG4 替代型号

型号 品牌 替代类型 描述 数据表
74FCT162501CTPVCT TI

完全替代

18-Bit Registered Transceivers
74FCT162501ATPVCT TI

完全替代

18-Bit Registered Transceivers
CY74FCT162501CTPVC TI

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18-Bit Registered Transceivers

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