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F29C51004T12JI PDF预览

F29C51004T12JI

更新时间: 2024-11-04 21:54:51
品牌 Logo 应用领域
其他 - ETC 闪存存储
页数 文件大小 规格书
16页 101K
描述
The F29C51004T/F29C51004B is a high speed 524,288 x 8 bit CMOS flash memory

F29C51004T12JI 数据手册

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F29C51004T/F29C51004B  
4 MEGABIT (524,288 x 8 BIT)  
5 VOLT CMOS FLASH MEMORY  
Syn cMO S  
Features  
Description  
The F29C51004T/F29C51004B is a high speed  
512Kx8-bit Organization  
524,288 x 8 bit CMOS flash memory. Writing or  
erasing the device is done with a single 5 Volt  
power supply. The device has separate chip enable  
CE, write enable WE, and output enable OE  
controls to eliminate bus contention.  
The F29C51004T/F29C51004B offers a combi-  
nation of: Boot Block with Sector Erase/Write  
Mode. The end of write/erase cycle is detected by  
Address Access Time: 70, 90, 120 ns  
Single 5V ± 10% Power Supply  
Sector Erase Mode Operation  
16KB Boot Block (lockable)  
1K bytes per Sector, 512 Sectors  
– Sector-Erase Cycle Time: 10ms (Max)  
– Byte-Write Cycle Time: 20µs (Max)  
Minimum 10,000 Erase-Program Cycles  
Low power dissipation  
– Active Read Current: 20mA (Typ)  
– Active Program Current: 30mA (Typ)  
– Standby Current: 50µA (Max)  
Hardware Data Protection  
DATA Polling of I/O or by the Toggle Bit I/O .  
7
6
TheF29C51004T/F29C51004B features a  
sector erase operation which allows each sector to  
be erased and reprogrammed without affecting  
data stored in other sectors. The device also  
supports full chip erase.  
Boot block architecture enables the device to  
boot from a protected sector located either at the  
top (F29C51004T) or the bottom (F29C51004B).  
All inputs and outputs are CMOS and TTL  
compatible.  
Low V Program Inhibit Below 3.5V  
CC  
Self-timed write/erase operations with end-of-cy-  
cle detection  
– DATA Polling  
– Toggle Bit  
CMOS and TTL Interface  
Available in two versions  
– F29C51004T (Top Boot Block)  
– F29C51004B (Bottom Boot Block)  
Packages:  
The F29C51004T/F29C51004B is ideal for  
applications that require updatable code and data  
storage.  
– 32-pin Plastic DIP  
– 32-pin TSOP-I  
– 32-pin PLCC  
Device Usage Chart  
Access Time (ns)  
Temperature  
Operating  
Temperature  
Range  
Package Outline  
P
T
J
70  
90  
120  
Mark  
Blank  
I
0°C to 70 °C  
–40°C to +85°C  
F29C51004T/F29C51004B V1.0 November 1998  
1

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