5秒后页面跳转
EPA120BV PDF预览

EPA120BV

更新时间: 2024-11-20 06:57:31
品牌 Logo 应用领域
EXCELICS 晶体晶体管
页数 文件大小 规格书
2页 38K
描述
High Efficiency Heterojunction Power FET

EPA120BV 技术参数

生命周期:Obsolete零件包装代码:DIE
包装说明:UNCASED CHIP, R-XUUC-N3针数:3
Reach Compliance Code:unknownECCN代码:EAR99
风险等级:5.77其他特性:HIGH RELIABILITY
配置:SINGLE最小漏源击穿电压:12 V
最大漏极电流 (Abs) (ID):0.5 A最大漏极电流 (ID):0.47 A
FET 技术:HETERO-JUNCTION最高频带:KU BAND
JESD-30 代码:R-XUUC-N3元件数量:1
端子数量:3工作模式:DEPLETION MODE
最高工作温度:175 °C封装主体材料:UNSPECIFIED
封装形状:RECTANGULAR封装形式:UNCASED CHIP
极性/信道类型:N-CHANNEL功耗环境最大值:4.5 W
子类别:FET RF Small Signal表面贴装:YES
端子形式:NO LEAD端子位置:UPPER
晶体管元件材料:SILICONBase Number Matches:1

EPA120BV 数据手册

 浏览型号EPA120BV的Datasheet PDF文件第2页 
EPA120B/EPA120BV  
Excelics  
DATA SHEET  
High Efficiency Heterojunction Power FET  
550  
156  
50  
D
+29.5dBm TYPICAL OUTPUT POWER  
9.0dB TYPICAL POWER GAIN FOR EPA120B AND  
10.5dB FOR EPA120BV AT 18GHz  
D
G
48  
0.3 X 1200 MICRON RECESSED “MUSHROOM” GATE  
Si3N4 PASSIVATION  
ADVANCED EPITAXIAL DOPING PROFILE  
PROVIDES HIGH POWER EFFICIENCY,  
LINEARITY AND RELIABILITY  
350  
100  
G
40  
EPA120BV WITH VIA HOLE SOURCE GROUNDING  
Idss SORTED IN 30mA PER BIN RANGE  
95  
50  
120  
Chip Thickness: 75 ± 20 microns  
All Dimensions In Microns  
:
Via Hole  
ELECTRICAL CHARACTERISTICS (Ta = 25 OC)  
No Via Hole For EPA120B  
SYMBOLS  
PARAMETERS/TEST CONDITIONS  
EPA120B  
TYP  
UNIT  
EPA120BV  
MIN  
MAX  
MIN  
TYP  
MAX  
Output Power at 1dB Compression  
Vds=8V, Ids=50% Idss  
f=12GHz  
f=18GHz  
28.0  
29.5  
29.5  
28.0  
29.5  
29.5  
P1dB  
G1dB  
PAE  
Idss  
Gm  
dBm  
dB  
%
Gain at 1dB Compression  
Vds=8V, Ids=50% Idss  
f=12GHz  
f=18GHz  
10.0  
11.5  
9.0  
11.5  
13.0  
10.5  
Gain at 1dB Compression  
Vds=8V, Ids=50% Idss  
f=12GHz  
45  
46  
Saturated Drain Current Vds=3V, Vgs=0V  
220  
240  
360  
500  
-2.5  
220  
240  
360  
500  
-2.5  
mA  
mS  
V
Transconductance  
Pinch-off Voltage  
Vds=3V, Vgs=0V  
380  
-1.0  
-15  
-14  
40  
380  
-1.0  
-15  
-14  
30  
Vp  
Vds=3V, Ids=3.0mA  
BVgd  
BVgs  
Rth  
Drain Breakdown Voltage Igd=1.2mA  
Source Breakdown Voltage Igs=1.2mA  
Thermal Resistance (Au-Sn Eutectic Attach)  
-11  
-7  
-11  
-7  
V
V
oC/W  
MAXIMUM RATINGS AT 25OC  
SYMBOLS  
PARAMETERS  
EPA120B  
EPA120BV  
ABSOLUTE1  
CONTINUOUS2  
ABSOLUTE1  
CONTINUOUS2  
Vds  
Vgs  
Ids  
Drain-Source Voltage  
Gate-Source Voltage  
Drain Current  
12V  
8V  
12V  
8V  
-8V  
-3V  
-8V  
-3V  
Idss  
355mA  
10mA  
Idss  
470mA  
10mA  
Igsf  
Pin  
Forward Gate Current  
Input Power  
60mA  
27dBm  
60mA  
27dBm  
@ 3dB  
@ 3dB  
Compression  
Compression  
Tch  
Tstg  
Pt  
Channel Temperature  
Storage Temperature  
Total Power Dissipation  
175oC  
150oC  
175oC  
150oC  
-65/175oC  
-65/150oC  
-65/175oC  
-65/150oC  
3.4W  
2.8W  
4.5W  
3.8W  
Note: 1. Exceeding any of the above ratings may result in permanent damage.  
2. Exceeding any of the above ratings may reduce MTTF below design goals.  
Excelics Semiconductor, Inc., 2908 Scott Blvd., Santa Clara, CA 95054  
Phone: (408) 970-8664 Fax: (408) 970-8998 Web Site: www.excelics.com  

与EPA120BV相关器件

型号 品牌 获取价格 描述 数据表
EPA120D EXCELICS

获取价格

High Efficiency Heterojunction Power FET
EPA120D-CP083 EXCELICS

获取价格

High Efficiency Heterojunction Power FET
EPA120E EXCELICS

获取价格

High Efficiency Heterojunction Power FET
EPA120E-CP083 EXCELICS

获取价格

High Efficiency Heterojunction Power FET
EPA120EV EXCELICS

获取价格

High Efficiency Heterojunction Power FET
EPA120G PCA

获取价格

4 Line Common Mode Filter
EPA1216G PCA

获取价格

Isolation Transformer for Lan-Ethernet Applications
EPA1220HL-100 PCA

获取价格

14 Pin DIP 5 Tap TTL Compatible High Speed Active Delay Lines
EPA1220HL-1000 PCA

获取价格

14 Pin DIP 5 Tap TTL Compatible High Speed Active Delay Lines
EPA1220HL-125 PCA

获取价格

14 Pin DIP 5 Tap TTL Compatible High Speed Active Delay Lines