Datasheet > EDI8L32512V-AC

EDI8L32512V-AC

更新时间： 2024-02-12 20:04:52

品牌	Logo	应用领域
其他 - ETC		/
页数	文件大小	规格书
7页	128K
描述
TMS320C3000. TMS320C4000 Families

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中文翻译

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数据手册

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EDI8L32512V-AC 数据手册

EDI8L32512V

512Kx32 SRAM MODULE, 3.3V

The EDI8L32512V is a high speed, 3.3V, 16 megabit SRAM. The

device is available with access times of 12, 15, 17 and 20ns

allowing the creation of a no wait state DSP and RISC micropro-

cessor memory solutions.

FEATURES

■ DSP Memory Solution

• ADSP-21060L (SHARC)

• ADSP-21062L (SHARC)

•Texas Instruments TMS320LC31

The device can be configured as a 512K x 32 and used to create a

single chip external data memory solution for TI’s TMS320LC31

(figure 5), or Analog’s SHARC™ DSP (figure 6).

■ RISC Memory Solution

• MPC860 (Power Quic)

The device provides a 56% space savings when compared to four

512K x 8, 36 pin SOJs. In addition the EDI8L32512C has only a 10pF

load on the data lines vs. 32pf for four plastic SOJs.

■ Random Access Memory Array

• Fast Access Times: 12, 15, 17, and 20ns

• Individual Byte Enables

• User configurable organization with Minimal Additional Logic

• Master Output Enable and Write Control

• TTL Compatible Inputs and Outputs

• Fully Static, No Clocks

The device provides a memory upgrade of the EDI8L32256V (256K

x 32) or the EDI8L32128V (128K x 32) (figure 8). Alternatively, the

device’s chip enables can configure it as a 1M x 16. A 1Mx 48

program memory array for Analog’s SHARC DSP is created using

three devices (figure 7). If this memory is too deep, two 512K x 24s

(EDI8L24512V) can be used to create a 512K x 48 array or two 128K

x 24s (EDI8L24128V) can be used to create a 128K x 48 array.

■ Surface Mount Package

• 68 Lead PLCC, No. 99 JEDEC M0-47AE

• Small Footprint, 0.990 Sq. In.

Note: Solder Reflow Temperature should not exceed 260°C for 10 seconds.

• Multiple Ground Pins for Maximum Noise Immunity

■ Single +3.3V (±5%) Supply Operation

FIG. 1 PIN CONFIGURATION

PIN DESCRIPTION

TOP VIEW

A0-18

E0-3

Address Inputs

Chip Enables

(One per Byte)

Master Write Enable

60 DQ14

DQ17 10

59 DQ13

DQ18 11

58 DQ12

DQ19 12

Master Output

Enable

VSS

SS 13

56 DQ11

55 DQ10

54 DQ9

53 DQ8

DQ20 14

DQ21 15

DQ22 16

DQ23 17

DQ0-31

Common Data

Input/Output

VCC

VCC Power (+3.3V±5%)

CC 18

51 DQ7

50 DQ6

49 DQ5

48 DQ4

DQ24 19

DQ25 20

DQ26 21

DQ27 22

VSS

Ground

No Connection

VSS

SS 23

46 DQ3

45 DQ2

44 DQ1

DQ28 24

DQ29 25

DQ30 26

BLOCK DIAGRAM

-DQ

512K x 32

Memory

Array

8-DQ15

DQ16-DQ23

DQ24-DQ31

NOTE: For memory upgrade information, refer to Page 7, Figure 8 “EDI

MCM-L upgrade path.

October 2000 Rev. 3

ECO# 13316

White Electronic Designs Corporation • (508) 366-5151 • www.whiteedc.com

12 3 4 5 6 7

中文翻译

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与EDI8L32512V-AC相关器件

型号	品牌	获取价格	描述	数据表
EDI8L3265C	WEDC	获取价格	64Kx32 CMOS High Speed
EDI8L3265C10AC	WEDC	获取价格	SRAM Module, 64KX32, 10ns, CMOS, PQCC68,
EDI8L3265C12AC	WEDC	获取价格	64Kx32 CMOS High Speed
EDI8L3265C15AC	WEDC	获取价格	64Kx32 CMOS High Speed
EDI8L3265C15AI	WEDC	获取价格	64Kx32 CMOS High Speed
EDI8L3265C20AC	WEDC	获取价格	64Kx32 CMOS High Speed
EDI8L3265C20AI	WEDC	获取价格	64Kx32 CMOS High Speed
EDI8L3265C25AC	WEDC	获取价格	64Kx32 CMOS High Speed
EDI8L3265C25AI	WEDC	获取价格	64Kx32 CMOS High Speed
EDI8L3265C-AC	ETC	获取价格	TMS320C3000. TMS320C4000 Families

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