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EDI8G32259V12MMC PDF预览

EDI8G32259V12MMC

更新时间: 2024-11-15 23:50:11
品牌 Logo 应用领域
其他 - ETC 静态存储器
页数 文件大小 规格书
7页 163K
描述
x32 SRAM Module

EDI8G32259V12MMC 数据手册

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EDI8F32259V  
256Kx32 Static RAM CMOS, High Speed Module  
FEATURES  
DESCRIPTION  
•
256Kx32 bit CMOS Static RAM  
• Access Times: 12, 15, 20, and 25ns  
• Individual Byte Selects  
The EDI8F32259V is a high speed 8Mb Static RAM module  
organized as 256K words by 32 bits. This module is constructed  
from eight 256Kx4 Static RAMs in SOJ packages on an epoxy  
laminate (FR4) board.  
• Fully Static, No Clocks  
Four chip enables (EØ-E3) are used to independently enable the  
four bytes. Reading or writing can be executed on individual  
bytes or any combination of multiple bytes through proper use of  
selects.  
• TTL Compatible I/O  
•
•
High Density Package with JEDEC Standard Pinouts  
• 72 Pin SIMM No. 175 (Angle)  
• 72 Pin ZIP No. 176  
The EDI8F32259V is offered in 72 pin ZIP/SIMM package which  
enables eight megabits of memory to be placed in less than 1.3  
square inches of board space.  
• 72 Pin SIMM, No. 354 (Straight)  
Single +3.3V (±10%) Supply Operation  
All inputs and outputs are TTL compatible and operate from a  
single 3.3V supply. Fully asynchronous circuitry requires no  
clocks or refreshing for operation and provides equal access and  
cycle times for ease of use.  
The ZIP and SIMM modules contain four PD (Presence Detect)  
pins which are used to identify module memory density in appli-  
cations where alternate modules can be interchanged.  
FIG. 1  
PIN NAMES  
PIN CONFIGURATIONS AND BLOCK DIAGRAM  
AØ-A17  
EØ-E3  
W,  
Address Inputs  
Chip Enables  
Write Enables  
G
Output Enable  
DQØ-DQ31  
VCC  
Common Data Input/Output  
Power (3.3V±10%)  
Ground  
VSS  
0
PD 1,2 = VSS  
PD 3,4 = Open  
Aug. 2001 Rev. 0  
ECO #14563  
White Electronic Designs Corporation • (508) 366-5151 • www.whiteedc.com  
1

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