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EDI8F3265C20MNC PDF预览

EDI8F3265C20MNC

更新时间: 2024-09-23 15:31:31
品牌 Logo 应用领域
WEDC 静态存储器内存集成电路
页数 文件大小 规格书
7页 601K
描述
SRAM Module, 64KX32, 20ns, CMOS, ANGLED, SIMM-64

EDI8F3265C20MNC 数据手册

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EDI8F3265C  
64Kx32 Static RAM CMOS, High Speed Module  
FEATURES  
DESCRIPTION  
The EDI8F3265C is a high speed 2 megabit Static RAM module  
organized as 64Kx32. This module is constructed from eight  
64Kx4 Static RAMs in SOJ packages on an epoxy laminate (FR4)  
board.  
n 64Kx32 bit CMOS Static  
n Random Access Memory  
• Access Times 12 through 25ns  
• Individual Byte Selects  
Four chip Enables (EØ-E3) are used to independently enable the  
four bytes. Reading or writing can be executed on individual  
bytes or any combination of multiple bytes through proper use of  
selects.  
• Output Enable Function  
• Fully Static, No Clocks  
• TTL Compatible I/O  
The EDI8F3265C is offered in a both 64 lead SIMM and 64 pin  
ZIP packages, which enable two megabits of memory to be  
placed in less than 1.2 square inches of board space.  
n High Density Packaging  
• 64 Pin SIMM, No. 30-Straight  
• 64 Pin SIMM, No. 342 Angled  
• 64 Pin ZIP, No. 87  
All inputs and outputs are TTL compatible and operate from a  
single 5V supply. Fully asynchronous circuitry is used, requiring  
no clocks or refreshing for operation and providing equal access  
and cycle times for ease of use.  
• JEDEC Standard Pinout  
• Common Data Inputs and Outputs  
n Single +5V (±10%) Supply Operation  
PIN CONFIGURATIONS AND BLOCK DIAGRAM  
PIN NAMES  
A0-A15  
EØ-E3  
W
Address Inputs  
Chip Enable  
Write Enable  
G
Output Enable  
Common Data Input/Output  
Power (+5V±10%)  
Ground  
DQØ-DQ3  
VCC  
VSS  
NC  
No Connection  
White Electronic Designs Corporation • (508) 366-5151 • www.whiteedc.com  
Oct. 2002 Rev. 9A  
ECO #15655  
1

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