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EC24C512BR1GR PDF预览

EC24C512BR1GR

更新时间: 2024-10-15 01:23:11
品牌 Logo 应用领域
飞虹 - E-CMOS 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
13页 427K
描述
512K bitsTwo-wire Serial EEPROM

EC24C512BR1GR 数据手册

 浏览型号EC24C512BR1GR的Datasheet PDF文件第2页浏览型号EC24C512BR1GR的Datasheet PDF文件第3页浏览型号EC24C512BR1GR的Datasheet PDF文件第4页浏览型号EC24C512BR1GR的Datasheet PDF文件第5页浏览型号EC24C512BR1GR的Datasheet PDF文件第6页浏览型号EC24C512BR1GR的Datasheet PDF文件第7页 
EC24C512B  
512K bitsTwo-wire Serial EEPROM  
General Description  
The EC24C512B are EEPROM devices that use device, and a series of data, if appropriate. The  
the industrial standard 2-wire interface for EC24C512B also has a Write Protect pin (WP) to allow  
communications. The EC24C512B contains a blocking any write operations over specified memory area.  
memory array of 512K-bits (65,536x8), which is Under no circumstance, the device will be hung up. In  
organized in 128-byte per page. The EEPROM order to refrain the state machine entering into a wrong  
can operate in a wide voltage range from 1.7V to state during power-up sequence or a power toggle off-on  
5.5V which fits most application. This product can  
condition, a power on reset circuit is embedded. During  
provide a low-power 2-wire EEPROM solution. power-up, the device does not respond to any instructions  
The device is offered in Lead-free, RoHS, halogen until the supply voltage (VCC) has reached an acceptable  
free or Green. The available package types are 8- stable level above the reset threshold voltage. Once VCC  
pin MSOP . The EC24C512B is compatible with passes the power on reset threshold, the device is reset  
the industrial standard 2-wire bus protocol. If in and enters into the Standby mode. This would also avoid  
case the bus is not responded, a new sent Op- any inadvertent Write operations during power-up stage.  
code command will reset the bus and the device During power-down process, the device will enter into  
will respond correctly. The simple bus consists of standby mode, once VCC drops below the power on reset  
the Serial Clock wire (SCL) and the Serial Data threshold voltage. In addition, the device will be in standby  
wire (SDA).  
mode after receiving the Stop command, provided that no  
Utilizing such bus protocol, a Master device, such internal write operation is in progress. Nevertheless, it is  
as a microcontroller, can usually control one or illegal to send a command unless the VCC is within its  
more Slave devices, alike this EC24C512B. The operating level.  
bit stream over the SDA line includes a series of  
bytes, which identifies a particular Slave device,  
an instruction, an address within that Slave  
Features  
Page Size: 128 bytes  
● Two-Wire Serial Interface, I C TM Compatible  
Bi-directional data transfer protocol  
● Wide-voltage Operation  
● Page write mode  
Up to 128 bytes per page write  
● Self timed write cycle with auto clear: 5ms (max.)  
● Filtered inputs for noise suppression  
● High-reliability  
VCC = 1.7V to 5.5V  
● Speed: 400 KHz (1.7V) and 1 MHz (2.5V~5.5V)  
uA, 1.7V  
● Operating current (max.): 2 mA, 1.7V  
● Hardware Data Protection  
Endurance: 1 million cycles  
Data retention: 100 years  
Write Protect Pin  
● Industrial temperature grades  
● Packages: MSOP 8L  
● Sequential & Random Read Features  
● Memory organization: 65,536 x 8 bits  
● Lead-free, RoHS, Halogen free, Green  
E-CMOS Corp. (www.ecmos.com.tw)  
Page 1 of 13  
4I09N-Rev.F001  

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