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DWX302 PDF预览

DWX302

更新时间: 2024-11-05 00:57:15
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Dual Bias Resistor Transistors

DWX302 数据手册

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SEMICONDUCTOR  
DWX Series  
TECHNICAL DATA  
Dual Bias Resistor Transistors  
6
5
NPN and PNP Silicon Surface Mount  
4
Transistors with Monolithic Bias Resistor Network  
1
2
3
The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network  
consisting of two resistors; a series base resistor and a base–emitter resistor. These digital tran-  
sistors are designed to replace a single device and its external resistor bias network. The BRT  
eliminates these individual components by integrating them into a single device. In the  
DWX Series , two complementary BRT devices are housed in the SOT–363 package  
SOT-363/SC-88  
6
5
4
which is ideal for low power surface mount applications where board space is at a premium.  
R1  
Simplifies Circuit Design  
Reduces Board Space  
R2  
Q2  
Reduces Component Count  
Pb-Free Package is available  
R2  
Q1  
R1  
1
2
3
MAXIMUM RATINGS (T A = 25°C unless otherwise noted, common for Q 1 and Q 2, – minus sign for Q 1(PNP) omitted)  
Rating  
Symbol Value  
Unit  
Vdc  
MARKING DIAGRAM  
Collector-Base Voltage  
Collector-Emitter Voltage  
Collector Current  
V CBO  
V CEO  
I C  
50  
50  
Vdc  
6
5
4
100  
mAdc  
XX  
THERMAL CHARACTERISTICS  
1
2
3
Characteristic  
(One Junction Heated)  
Total Device Dissipation  
TA = 25°C  
Symbol  
Max  
Unit  
xx = Device Marking  
(See Page 2)  
PD  
187 (Note 1.)  
256 (Note 2.)  
1.5 (Note 1.)  
2.0 (Note 2.)  
670 (Note 1.)  
490 (Note 2.)  
mW  
DEVICE MARKING  
INFORMATION  
Derate above 25°C  
mW/°C  
°C/W  
See specific marking information in  
the device marking table on page 2 of  
this data sheet.  
Thermal Resistance –  
Junction-to-Ambient  
R θ  
JA  
Characteristic  
(Both Junctions Heated)  
Symbol  
Max  
Unit  
Total Device Dissipation  
TA = 25°C  
P D  
250 (Note 1.)  
385 (Note 2.)  
2.0 (Note 1.)  
3.0 (Note 2.)  
mW  
Derate above 25°C  
mW/°C  
°C/W  
Thermal Resistance –  
Junction-to-Ambient  
Thermal Resistance –  
Junction-to-Lead  
R θJA  
R θJL  
493 (Note 1.)  
325 (Note 2.)  
188 (Note 1.)  
208 (Note 2.)  
°C/W  
Junction and Storage  
Temperature  
T J , T stg  
–55 to +150  
°C  
1. FR–4 @ Minimum Pad  
2. FR–4 @ 1.0 x 1.0 inch Pad  
2015. 1. 28  
Revision No : 0  
1/29  

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