Datasheet > DTA205

DTA205

更新时间： 2024-11-10 01:21:07

品牌	Logo	应用领域
FS		/
页数	文件大小	规格书
4页	272K
描述
Bias Resistor Transistors

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DTA205 数据手册

SEMICONDUCTOR

DTA205

TECHNICAL DATA

Bias Resistor Transistors

PNP Silicon Surface Mount Transistors

with Monolithic Bias Resistor Network

This new series of digital transistors is designed to replace a single

device and its external resistor bias network. The BRT (Bias Resistor

Transistor) contains a single transistor with a monolithic bias network

consisting of two resistors; a series base resistor and a base-emitter

resistor. The BRT eliminates these individual components by integrating

them into a single device. The use of a BRT can reduce both system

cost and board space. The device is housed in the SOT-23 package

which is designed for low power surface mount applications.

SOT-23

PIN 3

COLLECTOR

(OUTPUT)

• Simplifies Circuit Design

• Reduces Board Space

• Reduces Component Count

PIN 1

BASE

(INPUT)

PIN 2

EMITTER

(GROUND)

•

The SOT-23 package can be soldered using wave or reflow. The

modified gull-winged leads absorb thermal stress during soldering

eliminating the poss bility of damage to the die.

Pb-Free

•

MAXIMUM RATINGS (T = 25 C unless otherwise noted)

Rating

Collector-Base Voltage

Collector-Emitter Voltage

Collector Current

Symbol

Value

Unit

Vdc

CBO

CEO

Vdc

100

mAdc

THERMAL CHARACTERISTICS

Characteristic

Symbol

Max

Unit

Total Device Dissipation

230 (Note 1)

338 (Note 2)

1.8 (Note 1)

2.7 (Note 2)

T = 25 C

Derate above 25 C

C/W

Thermal Resistance –

Junction-to-Ambient

540 (Note 1)

370 (Note 2)

Thermal Resistance –

Junction-to-Lead

264 (Note 1)

287 (Note 2)

Junction and Storage

Temperature Range

T , T

–55 to +150

stg

1. FR–4 @ Minimum Pad

2. FR–4 @ 1.0 x 1.0 inch Pad

ORDERING INFORMATION

Device

Marking

Shipping

3000/Tape&Reel

A6M

DTA205LT1G

2009. 11. 18

Revision No : 0

1/4

12 3 4

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