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DS92UT16TF PDF预览

DS92UT16TF

更新时间: 2024-09-24 22:12:51
品牌 Logo 应用领域
美国国家半导体 - NSC 数据传输
页数 文件大小 规格书
86页 1141K
描述
UTOPIA-LVDS Bridge for 1.6 Gbps Bi-directional Data Transfers

DS92UT16TF 数据手册

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February 2004  
DS92UT16TUF  
UTOPIA-LVDS Bridge for 1.6 Gbps Bi-directional Data  
Transfers  
— Two independent LVDS receiver serial ports for  
1.0 General Description  
optional 1:1 protection  
The DS92UT16 is a flexible UTOPIA to LVDS Bridge device.  
— Main and redundant LVDS transmit ports  
The LVDS Bridge transparently transports the UTOPIA bus  
— Loop timing capability enables LVDS recovered clock  
over a high speed LVDS serial link. The device includes  
to internally drive LVDS transmit clock  
many reliability features such as an optional 1:1 protection  
— Internal buffers allow maximum LVDS serial bit rate  
and built in bit error rate checking.  
independent of UTOPIA clock rate  
The parallel interface is user programmable for maximum  
flexibility. The user can choose between UTOPIA Level Level  
2 ATM layer (master) of PHY layer (slave). The UTOPIA-  
LVDS Bridge supports a special MPHY (multi-PHY layer)  
operation mode. The MPHY operation supports up to 248  
standard UTOPIA Level 2 PHY ports without adding external  
circuitry.  
n Programmable UTOPIA interface  
— UTOPIA Level 2 up to 52 MHz  
— ATM layer or PHY layer interface  
— ATM layer interface can support up to 248 standard  
Level 2 PHY ports with no additional external  
circuitry. Configured as 31 MPHY’s, each with up to 8  
sub-ports  
— Supports extended cell size up to 64 bytes  
— Supports 16- or 8-bit data buses with parity  
n Embedded bidirectional, non-blocking flow control over  
serial link for per MPHY back pressure  
n No external memories required  
The serial interface uses LVDS Serializer and Deserializer  
technology. The 16:1 bit serialization allows conveying the  
full-duplex parallel bus over two differential transmission  
pairs. This enables low cost backplanes and cables. Cable  
transmission length can be as long 16 meters.  
The serial link carries Flow control information (back pres-  
sure) in both directions. The Bridge device applies back  
pressure on a per queue basis over the 31 internal FIFO  
queues. In addition, the serial link includes an OAM (Opera-  
tions and Maintenance) channel that does not detract from  
link performance.  
n Embedded OAM channel over serial link  
— Remote Alarm/Status Indications  
— Link Trace Label  
— Embedded Control Channel with flow control for  
software communication  
— BIP16 based error performance monitoring  
— In protected systems, the standby link OAM channel  
is available for embedded communications and  
performance/alarm monitoring  
There are many applications where the UTOPIA-LVDS  
Bridge simplifies designs. Box-to-box connections can use  
DS29UT16 devices across cables. Access multiplexor appli-  
cations can use the devices across a PCB backplane for  
point-to-point and lightly loaded multidrop configurations.  
n Multiple loop-back options  
n Standard microprocessor interface (Intel and Motorola  
compatible)  
n IEEE 1149.1 JTAG port  
n Temperature range: −40˚C to +85˚C  
n CMOS technology for low power  
2.0 Features  
n 832 Mbps LVDS 16-bit serializer and deserializer  
interface  
— Suitable for cable, printed circuit board, and  
backplane transmission paths  
— 10m cable at max LVDS data rate and greater than  
16m at min LVDS data rate  
n LVDS transceiver section uses 3.3V power supply.  
Digital UTOPIA section uses 2.5V power supply. All I/O  
are 3.3V tolerant.  
n 196 LBGA package, 15x15x1.37 mm, 1.0 mm ball pitch  
— Embedded clock with random data lock capability for  
clock recovery  
— PRBS (x31 + x28 + 1) based LVDS link BER test  
facility  
3.0 Ordering Information  
Order Number  
Package Information  
196 LBGA package, 15x15x1.37 mm, 1.0 mm ball pitch  
Package Number  
DS92UT16TUF  
NUJB0196  
© 2004 National Semiconductor Corporation  
DS200316  
www.national.com  

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